APL1581 Ver la hoja de datos (PDF) - Anpec Electronics

Número de pieza

componentes Descripción

Fabricante

APL1581

DUAL INPUT LOW DROPOUT REGULATOR

Anpec Electronics 

APL1581

Pin Configuration

5

4

TAB is VOUT

3

2

1

VIN

VCNTL

VOUT

ADJ (or GND)

VSENSE

TAB is VOUT

5

VIN

4

VCNTL

3

VOUT

2

ADJ(or GND)

1

VSENSE

Front View of TO-220-5

Front View of TO-252-5

TAB is VOUT

5

VIN

4

VCNTL

3

VOUT

2

ADJ (or GND)

1

VSENSE

Front View of TO-263-5

Pin Description

VSENSE 1

ADJ (or GND) 2

VCNTL 3

VIN 4

8 VOUT

7 VOUT

6 VOUT

5 VOUT

SOP-8-P (Top View)

NC = No internal connection

= Thermal Pad

(connected to VOUT plane for better heat

dissipation)

Pin 5~8 must be connected together by a shortest

wide track or plane.

PIN

Name

I/O

VSENSE

I

ADJ

O

GND

O

VOUT

O

VCNTL

I

VIN

I

Description

Positive side of the reference voltage, which allows remote sensing to

obtain excellent load regulation.

Negative side of the reference voltage, which allows to use resistor divider

to set an expect output voltage. A small bypass capacitor can be connected

from this pin to ground to improve PSRR performance.

For fixed voltage devices this is the bottom of the resistor divider that sets

the output voltage.

Output pin of the regulator, which connects to the TAB. A minimum of 10µF

capacitor must be connected from this pin to ground to ensure the stability.

Supply pin of the control circuitry, which must be always higher than VOUT

for the device to regulate. (See electrical characteristics)

Power input pin of the regulator, which must be always higher than VOUT for

the device to regulate. (See electrical characteristics)

Copyright © ANPEC Electronics Corp.

2

Rev. B.5 - Mar., 2008

www.anpec.com.tw

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