DS2890X-000 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2890X-000

1-Wire® Digital Potentiometer

Dallas Semiconductor -> Maxim Integrated 

b) Write-zero Time Slot

DS2890

VPULLUP

VPULLUP MIN

VIH MIN

VIL MAX

0V

RESISTOR

MASTER

tSLOT

tREC

DS2890

Sampling Window

15µs

(OD: 2µs)

(OD: 6µs)

60µs

t LOW0

REGULAR SPEED

60 µs ≤ tLOW0 < tSLOT < 120 µs

1 µs ≤ tREC < ∞

OVERDRIVE SPEED

6 µs ≤ tLOW0 < tSLOT < 16 µs

1 µs ≤ tREC < ∞

c) Read-data Time Slot

VPULLUP

VPULLUP MIN

VIH MIN

VIL MAX

0V

RESISTOR

MASTER

DS2890

tSLOT

tREC

Master

Sampling Window

tSU

tLOWR

tRDV

REGULAR SPEED

60 µs ≤ tSLOT < 120 µs

1 µs ≤ tLOWR < 15 µs

0 ≤ tRELEASE < 45 µs

1 µs ≤ tREC < ∞

tRDV = 15 µs

tSU < 1 µs

tRELEASE

OVERDRIVE SPEED

6 µs ≤ tSLOT < 16 µs

1 µs ≤ tLOWR < 2 µs

0 ≤ tRELEASE < 4 µs

1 µs ≤ tREC < ∞

tRDV = 2 µs

tSU < 1 µs

*The optimal sampling point for the master is as close as possible to the end time of the tRDV period

without exceeding tRDV. For the case of a Read-one time slot, this maximizes the amount of time for the

pull-up resistor to recover the line to a high level. For a Read-zero time slot it ensures that a read will

occur before the fastest 1-Wire device(s) release the line (tRELEASE = 0).

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