IS61SPS25632T/D IS61LPS25632T/D
IS61SPS25636T/D IS61LPS25636T/D
IS61SPS51218T/D IS61LPS51218T/D
ISSI ®
READ/WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
Symbol
Parameter
-150
Min.
Max.
fMAX
Clock Frequency
—
150
tKC
Cycle Time
6.7
—
tKH
Clock High Pulse Width
2.5
—
tKL
Clock Low Pulse Width
2.5
—
tKQ
Clock Access Time
—
3.8
tKQX(1)
Clock High to Output Invalid
1.5
—
tKQLZ(1,2)
Clock High to Output Low-Z
0
—
tKQHZ(1,2)
Clock High to Output High-Z
—
3.8
tOEQ
Output Enable to Output Valid
—
3.8
tOELZ(1,2)
Output Enable to Output Low-Z
0
—
tOEHZ(1,2)
Output Enable to Output High-Z
—
3.8
tAS
Address Setup Time
1.5
—
tSS
Address Status Setup Time
1.5
—
tWS
Write Setup Time
1.5
—
tCES
Chip Enable Setup Time
1.5
—
tAVS
Address Advance Setup Time
1.5
—
tAH
Address Hold Time
0.5
—
tSH
Address Status Hold Time
0.5
—
tWH
Write Hold Time
0.5
—
tCEH
Chip Enable Hold Time
0.5
—
tAVH
Address Advance Hold Time
0.5
—
Note:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
-133
Min.
Max.
—
133
7.5
—
2.8
—
2.8
—
—
4
1.5
—
0
—
—
4
—
4
0
—
—
4
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Integrated Silicon Solution, Inc. — 1-800-379-4774
13
PRELIMINARY INFORMATION Rev. 00B
05/09/01