ADV7121KN50 Ver la hoja de datos (PDF) - Analog Devices

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ADV7121KN50

CMOS 80 MHz, Triple 10-Bit Video DACs

Analog Devices 

ADV7121/ADV7122

If we, therefore, have a graphics system with a 1024 × 1024

resolution, a noninterlaced 60 Hz refresh rate and a retrace fac-

tor of 0.8, then:

Dot Rate = 1024 × 1024 × 60/0.8

= 78.6 MHz

The required CLOCK frequency is thus 78.6 MHz.

All video data and control inputs are latched into the ADV7121/

ADV7122 on the rising edge of CLOCK, as previously de-

scribed in the “Digital Inputs” section. It is recommended that

the CLOCK input to the ADV7121/ADV7122 be driven by a

TTL buffer (e.g., 74F244).

RED, BLUE

mA V

GREEN

mA V

19.05 0.714 26.67 1.000

92.5 IRE

1.44 0.054 9.05 0.340

0

0 7.62 0.286

0

0

7.5 IRE

40 IRE

NOTES

1. OUTPUTS CONNECTED TO A DOUBLY TERMINATED 75Ω

LOAD.

2. VREF = 1.235V, RSET = 560Ω.

3. RS–343A LEVELS AND TOLERANCES ASSUMED ON ALL

LEVELS.

Figure 3. RGB Video Output Waveform

WHITE LEVEL

BLACK LEVEL

BLANK LEVEL

SYNC LEVEL

Table Ia. Video Output Truth Table for the ADV7122

Description

IOG

(mA)*

IOR, IOB

(mA)

SYNC

BLANK

WHITE LEVEL

26.67

19.05

1

1

VIDEO

video + 9.05 video + 1.44 1

1

VIDEO to BLANK video + 1.44 video + 1.44 0

1

BLACK LEVEL

9.05

1.44

1

1

BLACK to BLANK 1.44

1.44

0

1

BLANK LEVEL

7.62

0

1

0

SYNC LEVEL

0

0

0

0

*Typical with full-scale IOG = 26.67 mA. VREF = 1.235 V, RSET = 560 Ω, ISYNC connected to IOG.

Table Ib. Video Output Truth Table for the ADV7121

Description

IOR, IOG, IOB

(mA)*

WHITE LEVEL

VIDEO

VIDEO to BLACK

BLACK LEVEL

17.62

video

video

0

*Typical with full scale = 17.62 mA. VREF = 1.235 V, RSET = 560 Ω.

DAC

Input Data

3FFH

data

data

00H

00H

xxH

xxH

DAC

Input Data

3FF

data

data

00H

–8–

REV. B

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