ADM1031
ELECTRICAL CHARACTERISTICS TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted. (Note 1)
Parameter
Test Conditions/Comments
Min
Typ
Max
OPEN−DRAIN SERIAL DATA BUS OUTPUT (SDA)
Output Low Voltage, VOL
High−Level Output Leakage Current, IOH
SERIAL BUS DIGITAL INPUTS (SCL, SDA)
IOUT = –6.0 mA; VCC = 3.0 V
VOUT = VCC
0.4
0.1
1.0
Input High Voltage, VIH
Input Low Voltage, VIL
Hysteresis
2.1
0.8
500
DIGITAL INPUT LOGIC LEVELS (Note 2) (ADD, THERM, TACH1/2)
Input High Voltage, VIH
Input Low Voltage, VIL
DIGITAL INPUT LEAKAGE CURRENT
2.1
0.8
Input High Current, IIH
Input Low Current, IIL
Input Capacitance, CIN
FAN RPM−TO−DIGITAL CONVERTER
Accuracy
Full−Scale Count
VIN = VCC
VIN = 0
60°C ≤ TA ≤ 100°C
–1.0
1.0
5.0
±6.0
255
TACH Nominal Input RPM
Divisor N = 1, Fan Count = 153
Divisor N = 2, Fan Count = 153
Divisor N = 4, Fan Count = 153
Divisor N = 8, Fan Count = 153
4400
2200
1100
550
Conversion Cycle Time
637
SERIAL BUS TIMING (Note 3)
Clock Frequency, fSCLK
See Figure 2
10
100
Glitch Immunity, tSW
See Figure 2
50
Bus Free Time, tBUF
See Figure 2
4.7
Start Setup Time, tSU;STA
See Figure 2
4.7
Start Hold Time, tHD;STA
See Figure 2
4.0
Stop Condition Setup Time, tSU;STO
See Figure 2
4.0
SCL Low Time, tLOW
See Figure 2
1.3
SCL High Time, tHIGH
See Figure 2
4.0
50
SCL, SDA Rise Time, tR
See Figure 2
1000
SCL, SDA Fall Time, tF
See Figure 2
300
Data Setup Time, tSU;DAT
See Figure 2
250
Data Hold Time, tHD;DAT
See Figure 2
300
1. Typicals are at TA = 25°C and represent most likely parametric norm. Shutdown current typ is measured with VCC = 3.3 V.
2. ADD is a three−state input that can be pulled high, low, or left open−circuit.
3. Timing specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.2 V for a rising edge.
tLOW tR
tF
tHD:STA
SCL
tHD:STA
tHD:DAT
tHIGH
tSU:DAT
tSU:STA
tSU:STO
SDA
tBUF
P
S
S
P
Figure 2. Diagram for Serial Bus Timing
Unit
V
mA
V
V
mV
V
V
mA
mA
pF
%
RPM
ms
kHz
ns
ms
ms
ms
ms
ms
ms
ns
ns
ns
ns
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