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ADM1021ARQ Ver la hoja de datos (PDF) - Analog Devices

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ADM1021ARQ Datasheet PDF : 12 Pages
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ADM1021
APPLICATION CIRCUITS
Figure 18 shows a typical application circuit for the ADM1021,
using a discrete sensor transistor connected via a shielded,
twisted pair cable. The pull-ups on SCLK, SDATA and ALERT
are required only if they are not already provided elsewhere in
the system.
The SCLK, and SDATA pins of the ADM1021 can be inter-
faced directly to the SMBus of an I/O controller such as the
Intel PCI ISA IDE Xcelerator (PIIX4) chip type 82371AB.
Figure 19 shows how the ADM1021 might be integrated into a
system using this type of I/O controller.
C1*
2N3904 SHIELD
*C1 IS OPTIONAL
ADM1021 VDD
STBY
D+
SCLK
SDATA
D–
ALERT
ADD0
ADD1
GND
0.1F
3.3V
ALL 10k
IN
I/O
OUT
TO PIIX4
CHIP
SET TO REQUIRED
ADDRESS
Figure 18. Typical ADM1021 Application Circuit
HOST BUS
PROCESSOR
BUILT-IN
SENSOR
MAIN MEMORY
(DRAM)
SECOND LEVEL
CACHE
HOST-TO-PCI
BRIDGE
PCI BUS (3.3V OR 5V 30/33MHz)
MAIN MEMORY
(DRAM)
PCI SLOTS
CD ROM
HARD
DISK
BMI IDE
ULTRA DMA/33
HARD
DISK
8237 1AB
(PIIX4)
ISA/EIO BUS
(3.3V, 5V TOLERANT)
USB PORT 1
D– D+
ADM1021
ALERT SCLK SDATA
USB PORT 2
GPI[I,O] (30+)
SMBUS
AUDIO
KEYBOARD
SERIAL PORT
PARALLEL PORT
FLOPPY DISK
CONTROLLER
INFRARED
BIOS
Figure 19. Typical System Using ADM1021
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Shrink Small Outline Package
(RQ-16)
0.197 (5.00)
0.189 (4.80)
16
0.157 (3.99)
0.150 (3.81)
1
9
0.244 (6.20)
0.228 (5.79)
8
PIN 1
0.059 (1.50)
MAX
0.069 (1.75)
0.053 (1.35)
0.010 (0.25)
0.004 (0.10)
0.025
(0.64)
BSC
8؇
0.012 (0.30) SEATING 0.010 (0.20) 0؇
0.008 (0.20) PLANE 0.007 (0.18)
0.050 (1.27)
0.016 (0.41)
–12–
REV. 0

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