ADE7762
POWER SUPPLY MONITOR
The ADE7762 contains an on-chip power supply monitor. The
power supply (VDD) is monitored continuously by the ADE7762.
At power up, when the supply is less than 4V ±2% and VREF is less
than 1.9 V (typ), the outputs of the ADE7762 are inactive and the
data path is held in reset. Once VDD is greater than 4V ±2% and
VREF is greater than 1.9 V (typ), the chip is active and energy
accumulation begins. At power-down, when VDD falls below 4 V
or VREF falls below 1.9 V (typ), the data path is again held in reset.
This implementation ensures correct device operation at power-
up and at power-down. The power supply monitor has built-in
hysteresis and filtering. This gives a high degree of immunity to
false triggering due to noisy supplies.
The power supply and decoupling for the part should be such
that the ripple at VDD does not exceed ±5% as specified for
normal operation.
Preliminary Technical Data
5V
4V
2.4V
1.9V
0V
VDD
VREF
INTERNAL
RESET
INACTIVE
ACTIVE
INACTIVE
Figure 24. On-Chip Power Supply Monitor
Rev. PrB | Page 18 of 28