ADE7753 Ver la hoja de datos (PDF) - Analog Devices
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ADE7753 Datasheet PDF : 60 Pages
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The flag in the interrupt status register as well as the IRQ output
are reset to their default values when the interrupt status register
with reset (RSTSTATUS) is read.
Zero-Crossing Timeout
The zero-crossing detection also has an associated timeout
register, ZXTOUT. This unsigned, 12-bit register is decremented
(1 LSB) every 128/CLKIN seconds. The register is reset to its
user programmed full-scale value every time a zero crossing is
detected on Channel 2. The default power on value in this
register is 0xFFF. If the internal register decrements to 0 before
a zero crossing is detected and the DISSAG bit in the mode
register is Logic 0, the SAG pin goes active low. The absence
of a zero crossing is also indicated on the IRQ pin if the ZXTO
enable bit in the interrupt enable register is set to Logic 1.
Irrespective of the enable bit setting, the ZXTO flag in the
interrupt status register is always set when the internal ZXTOUT
register is decremented to 0—see the ADE7753 Interrupts section.
The ZXOUT register can be written/read by the user and has an
address of 1Dh—see the ADE7753 Serial Interface section. The
resolution of the register is 128/CLKIN seconds per LSB. Thus the
maximum delay for an interrupt is 0.15 second (128/CLKIN × 212).
Figure 41 shows the mechanism of the zero-crossing timeout
detection when the line voltage stays at a fixed dc level for more
than CLKIN/128 × ZXTOUT seconds.
12-BIT INTERNAL
REGISTER VALUE
ZXTOUT
CHANNEL 2
ZXTO
DETECTION
BIT
Figure 41. Zero-Crossing Timeout Detection
02875-0-041
PERIOD MEASUREMENT
The ADE7753 also provides the period measurement of the
line. The period register is an unsigned 16-bit register and is
updated every period. The MSB of this register is always zero.
ADE7753
The resolution of this register is 2.2 μs/LSB when CLKIN =
3.579545 MHz, which represents 0.013% when the line fre-
quency is 60 Hz. When the line frequency is 60 Hz, the value of
the period register is approximately CLKIN/4/32/60 Hz × 16 =
7457d. The length of the register enables the measurement of line
frequencies as low as 13.9 Hz.
The period register is stable at ±1 LSB when the line is
established and the measurement does not change. A settling
time of 1.8 seconds is associated with this filter before the
measurement is stable.
POWER SUPPLY MONITOR
The ADE7753 also contains an on-chip power supply monitor.
The analog supply (AVDD) is continuously monitored by the
ADE7753. If the supply is less than 4 V ± 5%, then the
ADE7753 goes into an inactive state, that is, no energy is
accumulated when the supply voltage is below 4 V. This is
useful to ensure correct device operation at power-up and
during power-down. The power supply monitor has built-in
hysteresis and filtering, which give a high degree of immunity
to false triggering due to noisy supplies.
AVDD
5V
4V
0V
ADE7753
POWER-ON
INACTIVE INACTIVE
STATE
TIME
ACTIVE
INACTIVE
SAG
Figure 42. On-Chip Power Supply Monitor
02875-0-042
As seen in Figure 42, the trigger level is nominally set at 4 V.
The tolerance on this trigger level is about ±5%. The SAG pin
can also be used as a power supply monitor input to the MCU.
The SAG pin goes logic low when the ADE7753 is in its inactive
state. The power supply and decoupling for the part should be
such that the ripple at AVDD does not exceed 5 V ±5%, as
specified for normal operation.
LINE VOLTAGE SAG DETECTION
In addition to the detection of the loss of the line voltage signal
(zero crossing), the ADE7753 can also be programmed to detect
when the absolute value of the line voltage drops below a
certain peak value for a number of line cycles. This condition is
illustrated in Figure 43.
Rev. C | Page 19 of 60
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