ADE7753 Ver la hoja de datos (PDF) - Analog Devices
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ADE7753 Datasheet PDF : 60 Pages
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ADE7753
–88.0
–88.5
–89.0
–89.5
–90.0
–90.5
–1.0
102
103
FREQUENCY (Hz)
Figure 37. Combined Phase Response of the
Digital Integrator and Phase Compensator
02875-0-037
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
–5.5
–6.0
40
45
50
55
60
65
70
FREQUENCY (Hz)
02875-0-038
Figure 38. Combined Gain Response of the
Digital Integrator and Phase Compensator (40 Hz to 70 Hz)
–89.70
–89.75
–89.80
–89.85
–89.90
–89.95
–90.00
–90.05
40
45
50
55
60
65
70
FREQUENCY (Hz)
02875-0-039
Figure 39. Combined Phase Response of the
Digital Integrator and Phase Compensator (40 Hz to 70 Hz)
Note that the integrator has a –20 dB/dec attenuation and an
approximately –90° phase shift. When combined with a di/dt
sensor, the resulting magnitude and phase response should be a
flat gain over the frequency band of interest. The di/dt sensor
has a 20 dB/dec gain associated with it. It also generates signifi-
cant high frequency noise, therefore a more effective anti-
aliasing filter is needed to avoid noise due to aliasing—see the
Antialias Filter section.
When the digital integrator is switched off, the ADE7753 can be
used directly with a conventional current sensor such as a current
transformer (CT) or with a low resistance current shunt.
ZERO-CROSSING DETECTION
The ADE7753 has a zero-crossing detection circuit on
Channel 2. This zero crossing is used to produce an external
zero-crossing signal (ZX), and it is also used in the calibration
mode—see the Calibrating an Energy Meter Based on the
ADE7753 section. The zero-crossing signal is also used to
initiate a temperature measurement on the ADE7753—see the
Temperature Measurement section.
Figure 40 shows how the zero-crossing signal is generated from
the output of LPF1.
V2P
V2
V2N
×1, ×2, ×1,
×8, ×16
REFERENCE
{GAIN [7:5]}
PGA2
1
ADC 2
–63% TO +63% FS
TO
MULTIPLIER
ZERO
CROSS
ZX
LPF1
f–3dB = 140Hz
2.32° @ 60Hz
1.0
0.93
ZX
V2
LPF1
Figure 40. Zero-Crossing Detection on Channel 2
02875-0-040
The ZX signal goes logic high on a positive-going zero crossing
and logic low on a negative-going zero crossing on Channel 2.
The zero-crossing signal ZX is generated from the output of
LPF1. LPF1 has a single pole at 140 Hz (at CLKIN = 3.579545
MHz). As a result, there is a phase lag between the analog input
signal V2 and the output of LPF1. The phase response of this
filter is shown in the Channel 2 Sampling section. The phase lag
response of LPF1 results in a time delay of approximately
1.14 ms (@ 60 Hz) between the zero crossing on the analog
inputs of Channel 2 and the rising or falling edge of ZX.
The zero-crossing detection also drives the ZX flag in the
interrupt status register. The ZX flag is set to Logic 0 on the
rising and falling edge of the voltage waveform. It stays low
until the status register is read with reset. An active low in the
IRQ output also appears if the corresponding bit in the
interrupt enable register is set to Logic 1.
Rev. C | Page 18 of 60
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