AD9913(Rev0) Ver la hoja de datos (PDF) - Analog Devices

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componentes Descripción

Fabricante

AD9913
(Rev.:Rev0)

Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer

Analog Devices 

AD9913

Pin No.

26

27

28

29

30

31

32

Mnemonic

I/O Description

PWR_DWN_CTL I

External Power-Down, Digital Input (Active High). A high level on this pin initiates the currently

programmed power-down mode. See the Power-Down Features section for further details. If unused,

tie to ground.

IO_UPDATE

I I/O Update; Digital Input. A high on this pin indicates a transfer of the contents of the I/O buffers to the

corresponding internal registers.

CS

I Chip Select for Serial and Parallel Port. Digital input (active low). Bringing this pin low enables the

AD9913 to detect serial (SCLK) or parallel (PCLK) clock rising/falling edges. Bringing this pin high

causes the AD9913 to ignore input on the data pins.

SDIO(WR/RD) I/O Bidirectional Data Line for Serial Port Operation and Write/Read Enable for Parallel Port Operation.

SCLK/PCLK

I Input Clock for Serial and Parallel Port.

ADR7/D7

I/O Parallel Port Address Line 7 and Data Line 7.

ADR6/D6

I/O Parallel Port Address Line 6 and Data Line 6.

Rev. 0 | Page 7 of 32

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