AD9480(Rev0) Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD9480 Datasheet PDF : 28 Pages
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AD9480
75
70
65
SFDR
60
55
50
SNR
45
SINAD
40
0
50
100
150
200
250
300
SAMPLE CLOCK (MHz)
Figure 26. SNR, SINAD, SFDR vs. Sample Clock Frequency,
AIN = 70 MHz −1 dBFS
80
70
SFDRdBFS
60
50
40
30
20
SFDRdBc
10
65dB
REF LINE
0
–70
–60
–50
–40
–30
–20
–10
0
ANALOG INPUT DRIVE LEVEL (dBFS)
Figure 27. SFDR vs. AIN Input Level; AIN = 70 MHz at 250 MSPS
0
F1, F2 = –7dBFS
–10 2F2-F1 = –71.1dBc
2F1-F2 = –68dBc
–20
–30
–40
–50
–60
–70
–80
–90
0
20
40
60
80
100
120
MHz
Figure 28. Two-Tone Intermodulation Distortion
(69.3 MHz and 70.3 MHz; fS = 250 MSPS)
180
160
140
120
IAVDD
100
80
60
40
IDRVDD
20
0
0
50
100
150
200
250
300
ENCODE (MSPS)
Figure 29. IAVDD and IDRVDD vs. Clock Rate, CLOAD = 5 pF
AIN = 70 MHz @ –1 dBFS
50
49
48
DCS ON
47
46
45
44
DCS OFF
43
42
41
40
20
30
40
50
60
70
80
CLOCK POSITIVE DUTY CYCLE (%)
Figure 30. SNR, SINAD vs. Clock Pulse Width High,
AIN = 70 MHz @ –1 dBFS, 250 MSPS, DCS On/Off
50.0
80
SNR
47.5
75
SINAD
45.0
70
SFDR
42.5
65
40.0
50
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
EXTERNAL VREF VOLTAGE (V)
Figure 31. SNR, SINAD, and SFDR vs. VREF in External Reference Mode,
AIN = 70 MHz @ –1 dBFS, 250 MSPS
Rev. 0 | Page 16 of 28
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