NT7702H-TABF4 Ver la hoja de datos (PDF) - Novatek Microelectronics
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NT7702H-TABF4 Datasheet PDF : 38 Pages
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NT7702
Segment Mode 3 (VSS = V5 = 0V, VDD = 2.5 - 3.0V, V0 = 15 to 30V, and TA = -30 to +85°C, unless otherwise noted)
Parameter
Symbol Min. Typ. Max. Unit
Condition
Shift clock period
tWCK
82
-
ns tr, tf 10ns, Note 1
Shift clock "H" pulse width
tWCKH
28
-
ns
Shift clock "L" pulse width
tWCKL
28
-
ns
Data setup time
tDS
20
-
ns
Data hole time
tDH
23
-
ns
Latch pulse "H" pulse width
tWLPH
30
-
ns
Shift clock rise to Latch pulse rise time
tLD
0
-
ns
Shift clock fall to Latch pulse fall time
tSL
65
-
ns
Latch pulse rise to Shift clock rise time
tLS
30
-
ns
Latch pulse fall to Shift clock fall time
tLH
30
-
ns
Input signal rise time
tr
-
50
ns Note 2
Input signal fall time
tf
-
50
ns Note 2
Enable setup time
tS
15
-
ns
DISPOFF Removal time
tSD
100
-
ns
DISPOFF enable pulse width
Output delay time (1)
Output delay time (2)
Output delay time (3)
tWDL
1.2
-
µs
tD
tpd1, tpd2
tpd3
-
57
ns CL = 15pF
-
1.2
µs CL = 15pF
-
1.2
µs CL = 15pF
Note
1. Take the cascade connection into consideration.
2. (tCK-tWCKII-tWCKL)/2 is the maximum in the case of high speed operation.
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