AD5173BRM100-RL7 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD5173BRM100-RL7
Analog Devices
AD5173BRM100-RL7 Datasheet PDF : 28 Pages
| |||
Data Sheet
AD5172/AD5173
Parameter
VW Settling Time
Resistor Noise Voltage Density
Symbol
tS
eN_WB
Conditions
VA = 5 V, VB = 0 V, ±1 LSB
error band
RWB = 1.25 kΩ, RS = 0 Ω
Min
Typ1 Max
1
3.2
Unit
µs
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
3 VA = VDD, VB = 0 V, wiper (VW) = no connect.
4 Specifications apply to all VRs.
5 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
6 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
7 Guaranteed by design, but not subject to production test.
8 Measured at Terminal A. Terminal A is open circuited in shutdown mode.
9 The minimum voltage requirement on the VIH is 0.7 V × VDD. For example, VIH minimum = 3.5 V when VDD = 5 V. It is typical for the SCL and SDA resistors to be pulled up to VDD.
However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up resistors.
10 Different from the operating power supply; the power supply for OTP is used one time only.
11 Different from the operating current; the supply current for OTP lasts approximately 400 ms for one time only.
12 See Figure 30 for an energy plot during an OTP program.
13 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
14 All dynamic characteristics use VDD = 5 V.
ELECTRICAL CHARACTERISTICS: 10 kΩ, 50 kΩ, AND 100 kΩ
VDD = 5 V ± 10% or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted.
Table 2.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
Wiper Resistance
DC CHARACTERISTICS—POTENTIOMETER DIVIDER
MODE4
Differential Nonlinearity5
Integral Nonlinearity5
Voltage Divider Temperature Coefficient
Full-Scale Error
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range6
Capacitance A, B7
Capacitance W7
Shutdown Supply Current8
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
SDA and SCL
Input Logic High9
Input Logic Low9
AD0 and AD1
Input Logic High
Input Logic Low
Input Current
Input Capacitance7
Symbol
Conditions
R-DNL
R-INL
ΔRAB
(ΔRAB/RAB)/ΔT
RWB
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
Code = 0x00, VDD = 5 V
DNL
INL
(ΔVW/VW)/ΔT
VWFSE
VWZSE
Code = 0x80
Code = 0xFF
Code = 0x00
VA, VB, VW
CA, CB
CW
IA_SD
ICM
f = 1 MHz, measured to
GND, code = 0x80
f = 1 MHz, measured to
GND, code = 0x80
VDD = 5.5 V
VA = VB = VDD/2
VIH
VDD = 5 V
VIL
VDD = 5 V
VIH
VDD = 3 V
VIL
VDD = 3 V
IIL
VIN = 0 V or 5 V
CIL
Min
−1
−2.5
−20
−1
−1
−2.5
0
GND
0.7 VDD
−0.5
2.1
Typ 1
±0.1
±0.25
35
160
±0.1
±0.3
15
−1
1
45
60
0.01
1
5
Max
+1
+2.5
+20
200
+1
+1
0
2.5
VDD
1
VDD + 0.5
+0.3 VDD
0.6
±1
Unit
LSB
LSB
%
ppm/°C
Ω
LSB
LSB
ppm/°C
LSB
LSB
V
pF
pF
µA
nA
V
V
V
V
µA
pF
Rev. I | Page 5 of 28
Share Link: