AD5173BRM2.5(RevA) Ver la hoja de datos (PDF) - Analog Devices

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AD5173BRM2.5
(Rev.:RevA)

256-Position One-Time Programmable Dual-Channel I2C Digital Potentiometers

Analog Devices 

AD5172/AD5173

ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS

Table 2. VDD = 5 V ± 10% or 3 V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted

Parameter

Symbol

Conditions

Min

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity2

R-DNL

RWB, VA = No Connect

–1

Resistor Integral Nonlinearity2

R-INL

RWB, VA = No Connect

–2.5

Nominal Resistor Tolerance3

∆RAB

TA = 25°C

–20

Resistance Temperature Coefficient

(∆RAB/RAB)/∆T VAB = VDD, Wiper = No Connect

RWB (Wiper Resistance)

RWB

Code = 0x00, VDD = 5 V

DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to all VRs)

Differential Nonlinearity4

DNL

–1

Integral Nonlinearity4

INL

–1

Voltage Divider Temperature Coefficient (∆VW/VW)/∆T Code = 0x80

Full-Scale Error

VWFSE

Code = 0xFF

–2.5

Zero-Scale Error

VWZSE

Code = 0x00

0

RESISTOR TERMINALS

Voltage Range5

Capacitance6 A, B

Capacitance6 W

Shutdown Supply Current7

VA, VB, VW

CA, CB

CW

IA_SD

GND

f = 1 MHz, Measured to GND, Code = 0x80

f = 1 MHz, Measured to GND, Code = 0x80

VDD = 5.5 V

Common-Mode Leakage

ICM

VA = VB = VDD/2

DIGITAL INPUTS AND OUTPUTS

Input Logic High

VIH

VDD = 5 V

2.4

Input Logic Low

VIL

VDD = 5 V

Input Logic High

VIH

VDD = 3 V

2.1

Input Logic Low

VIL

VDD = 3 V

Input Current

Input Capacitance6

IIL

VIN = 0 V or 5 V

CIL

POWER SUPPLIES

Power Supply Range

VDD RANGE

2.7

OTP Supply Voltage8

VDD_OTP

6

Supply Current

OTP Supply Current9

Power Dissipation10

IDD

VIH = 5 V or VIL = 0 V

IDD_OTP

100

PDISS

VIH = 5 V or VIL = 0 V, VDD = 5 V

Power Supply Sensitivity

PSS

VDD = +5 V ± 10%, Code = Midscale

DYNAMIC CHARACTERISTICS11

Bandwidth –3 dB

BW

RAB = 10 kΩ, Code = 0x80

RAB = 50 kΩ, Code = 0x80

RAB = 100 kΩ, Code = 0x80

Total Harmonic Distortion

THDW

VA =1 V rms, VB = 0 V, f = 1 kHz, RAB = 10 kΩ

VW Settling Time (10 kΩ/50 kΩ/100 kΩ)

tS

VA = 5 V, VB = 0 V, ±1 LSB Error Band

Resistor Noise Voltage Density

eN_WB

RWB = 5 kΩ, RS = 0

Typ1

±0.1

±0.25

35

160

±0.1

±0.3

15

–1

1

45

60

0.01

1

5

3.5

±0.02

600

100

40

0.1

2

9

Max

+1

+2.5

+20

200

+1

+1

0

2.5

VDD

1

0.8

0.6

±1

5.5

6.5

6

30

±0.08

Unit

LSB

LSB

%

ppm/°C

Ω

LSB

LSB

ppm/°C

LSB

LSB

V

pF

pF

µA

nA

V

V

V

V

µA

pF

V

V

µA

mA

µW

%/%

kHz

kHz

kHz

%

µs

nV/√Hz

1 Typical specifications represent average readings at 25°C and VDD = 5 V.

2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3 VAB = VDD, Wiper (VW) = no connect.

4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.

DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5 Resistor terminals A, B, W have no limitations on polarity with respect to each other.

6 Guaranteed by design and not subject to production test.

7 Measured at the A terminal. The A terminal is open circuited in shutdown mode.

8 Different from operating power supply, power supply OTP is used one time only.

9 Different from operating current, supply current for OTP lasts approximately 400 ms for one time only.

10 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

11 All dynamic characteristics use VDD = 5 V.

Rev. A | Page 4 of 24

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