AD5172BRM100(RevA) Ver la hoja de datos (PDF) - Analog Devices

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componentes Descripción

Fabricante

AD5172BRM100
(Rev.:RevA)

256-Position One-Time Programmable Dual-Channel I2C Digital Potentiometers

Analog Devices 

TEST CIRCUITS

Figure 27 to Figure 34 illustrate the test circuits that define the

test conditions used in the product specification tables.

DUT

A

V+

W

B

V+ = VDD

1LSB = V+/2N

VMS

Figure 27. Test Circuit for Potentiometer Divider Nonlinearity Error (INL, DNL)

NO CONNECT

DUT

A

W

B

IW

VMS

Figure 28. Test Circuit for Resistor Position Nonlinearity Error

(Rheostat Operation; R-INL, R-DNL)

VMS2

DUT

A

W

B

IW = VDD / RNOMINAL

VW

VMS1 RW = [VMS1 – VMS2]/ IW

Figure 29. Test Circuit for Wiper Resistance

VA

DUT

VDD A

V+

W

B

( ) V+= VDD 10%

PSRR (dB) = 20 LOG

∆V MS

∆V DD

PSS (%/%) = ∆VMS%

∆V DD%

VMS

Figure 30. Test Circuit for Power Supply Sensitivity (PSS, PSSR)

AD5172/AD5173

VIN

OFFSET

GND

2.5V

DUT

A

W

B

+15V

AD8610

–15V

VOUT

Figure 31. Test Circuit for Gain vs. Frequency

DUT

B

RSW =

0.1V

ISW

CODE = 0x00

W

ISW

0.1V

GND TO VDD

Figure 32. Test Circuit for Incremental On Resistance

NC

DUT

VDD

A

W

GND B

ICM

VCM

NC

Figure 33. Test Circuit for Common-Mode Leakage Current

A1

RDAC1

VDD

A2

RDAC2

W1

N/C

VIN

B1 VSS

W2

VOUT

B2

CTA = 20 log[VOUT/VIN]

Figure 34. Test Circuit for Analog Crosstalk

Rev. A | Page 11 of 24

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