AD5170BRM100-RL7(RevA) Ver la hoja de datos (PDF) - Analog Devices

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AD5170BRM100-RL7
(Rev.:RevA)

256-Position Two-Time Programmable I2C Digital Potentiometer

Analog Devices 

AD5170

ELECTRICAL CHARACTERISTICS — 2.5 kΩ

VDD = 5 V ± 10% or 3 V ±10%, VA = +VDD, VB = 0 V, –40°C < TA < +125°C, unless otherwise noted.

Table 1.

Parameter

Symbol

Conditions

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity2

Resistor Integral Nonlinearity2

Nominal Resistor Tolerance3

R-DNL

R-INL

∆RAB

RWB, VA = no connect

RWB, VA = no connect

TA = 25°C

Resistance Temperature Coefficient

(∆RAB/RAB)/∆T VAB = VDD, Wiper = no connect

RWB (Wiper Resistance)

RWB

Code = 0x00, VDD = 5 V

DC CHARACTERISTICS — POTENTIOMETER DIVIDER MODE (Specifications apply to all VRs)

Differential Nonlinearity4

DNL

Integral Nonlinearity4

INL

Voltage Divider Temperature Coefficient (∆VW/VW)/∆T Code = 0x80

Full-Scale Error

VWFSE

Code = 0xFF

Zero-Scale Error

VWZSE

Code = 0x00

RESISTOR TERMINALS

Voltage Range5

Capacitance6 A, B

VA,VB,VW

CA, CB

f = 1 MHz, measured to GND, code = 0x80

Capacitance W

Shutdown Supply Current7

CW

f = 1 MHz, measured to GND, code = 0x80

IA_SD

VDD = 5.5 V

Common-Mode Leakage

ICM

VA = VB = VDD/2

DIGITAL INPUTS AND OUTPUTS

Input Logic High

VIH

VDD = 5 V

Input Logic Low

VIL

VDD = 5 V

Input Logic High

VIH

VDD = 3 V

Input Logic Low

VIL

VDD = 3 V

Input Current

Input Capacitance5

IIL

VIN = 0 V or 5 V

CIL

POWER SUPPLIES

Power Supply Range

VDD RANGE

OTP Supply Voltage

VDD_OTP

TA = 25°C

Supply Current

IDD

VIH = 5 V or VIL = 0 V

OTP Supply Current

Power Dissipation8

IDD_OTP

PDISS

VDD_OTP = 5.5 V, TA = 25°C

VIH = 5 V or VIL = 0 V, VDD = 5 V

Power Supply Sensitivity

PSS

VDD = 5 V ± 10%, Code = midscale

DYNAMIC CHARACTERISTICS9

Bandwidth –3 dB

BW_2.5K

Code = 0x80

Total Harmonic Distortion

THDW

VA = 1 V rms, VB = 0 V, f = 1 kHz

VW Settling Time

tS

VA = 5 V, VB = 0 V, ±1 LSB error band

Resistor Noise Voltage Density

eN_WB

RWB = 1.25 kΩ, RS = 0

Min

–2

–6

–20

–1.5

–2

–10

0

GND

2.4

2.1

2.7

5.25

100

Typ1

±0.1

±0.75

35

160

±0.1

±0.6

15

–2.5

2

45

60

0.01

1

5

3.5

±0.02

4.8

0.1

1

3.2

Max

+2

+6

+55

200

+1.5

+2

0

10

VDD

1

0.8

0.6

±1

5.5

5.5

6

30

±0.08

Unit

LSB

LSB

%

ppm/°C

Ω

LSB

LSB

ppm/°C

LSB

LSB

V

pF

pF

µA

nA

V

V

V

V

µA

pF

V

V

µA

mA

µW

%/%

MHz

%

µs

nV/√Hz

1 Typical specifications represent average readings at 25°C and VDD = 5 V.

2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3 VAB = VDD, Wiper (VW) = no connect.

4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.

DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5 Resistor terminals A, B, W have no limitations on polarity with respect to each other.

6 Guaranteed by design and not subject to production test.

7 Measured at the A terminal. The A terminal is open circuited in shutdown mode.

8 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

9 All dynamic characteristics use VDD = 5 V.

Rev. A | Page 3 of 24

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