AD5162BRM2.5 Ver la hoja de datos (PDF) - Analog Devices
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AD5162BRM2.5 Datasheet PDF : 20 Pages
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AD5162
TIMING CHARACTERISTICS: ALL VERSIONS
VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted.
Table 3.
Parameter
SPI INTERFACE TIMING CHARACTERISTICS1
Clock Frequency
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CS Setup Time
CS High Pulse Width
CLK Fall to CS Fall Hold Time
CLK Fall to CS Rise Hold Time
CS Rise to Clock Rise Setup
Symbol
fCLK
tCH, tCL
tDS
tDH
tCSS
tCSW
tCSH0
tCSH1
tCS1
Conditions
Clock level high or low
Min Typ
20
5
5
15
40
0
0
10
1 See the timing diagrams for the locations of measured values (that is, see Figure 42 and Figure 43).
Max Unit
25
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Rev. C | Page 5 of 20
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