7005 Ver la hoja de datos (PDF) - Aeroflex Corporation
Número de pieza
componentes Descripción
Fabricante
7005 Datasheet PDF : 29 Pages
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Pin #
24
62
63
33
3
57
28
55
26
58
88
61
31
17
22
21
20
19
18
Signal Name
ENABLE
INT #l
INT #2
LTFAIL
MEREQ
MODEREST
M16/8
NBGT
NEXT STATUS
PASS
RD
RETRY
RESET
RTADPAR
RTAD0
RTAD1
RTAD2
RTAD3
RTAD4
Signal Description
Enable. When held low, enables Bit Decode, Next Status, and
Status Update program lines.
Good Block (RT) / VALID TRANSFER (BC)
VALID Transmit (RT) / INVALID TRANSFER (BC)
Loop Test Fail. This line goes low if any error in the terminals
own transmitted waveform is detected or if any parity error in the
hardwired RT address is detected.
Message Error Request. To set the Message Error bit in the
Status Word, this signal must go low within 650 nsec of INCMD
going low and remain valid for the DURATION of INCMD.
Mode Reset. This line pulses low for 500 ns on completion of
the servicing of a valid Reset Remote Terminal Mode
Command.
Programs Interface for 8 Bit or 16 Bit Data Buses.
16/8 = LOW (0) 8 BIT MODE
16/8 = HIGH (1) 16 BIT MODE
New Bus Grant. Pulses low whenever a new command is
accepted.
Next Status. When held low, causes TF or SSF to appear in very
next Status Word after fault occurrence (except for Transmit
Status or Transmit Last Command).
Pass. Interrupt indicates that the protocol self-test has
completed with no faults.
Read Strobe. Must GO LOW together with DS to perform a
READ OPERATION. Note: WT STROBE MUST BE HIGH.
Retry Interrupt
System MASTER Reset. When low resets all registers and
INPUT/OUTPUT FIFO buffers. Minimum Low Time for reset 0.5
µsec.
RT Address Parity. This must be hardwired by the user to give
odd parity.
RT Address Lines. These should be hardwired
by the user. RTAD4 is the most significant bit.
Table 11 – Pin Number Description (continued)
Aeroflex Circuit Technology
21
SCD7005 REV B 8/2/01 Plainview NY (516) 694-6700
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