A67P9318/A67P8336
Partial Truth Table for READ/WRITE Commands (X18)
READ
Operation
R/ W
H
WRITE Byte “a”
L
WRITE Byte “b”
L
WRITE all bytes
L
WRITE Abort/NOP
L
Note : Using and BYTE WRITE(s), any one or more bytes may be written.
BW1
X
L
H
L
H
BW2
X
H
L
L
H
Partial Truth Table for READ/WRITE Commands (X36)
Operation
READ
WRITE Byte “a”
R/ W
H
L
BW1
X
L
BW2
X
H
WRITE Byte “b”
L
H
L
WRITE Byte “c”
L
H
H
WRITE Byte “d”
L
H
H
WRITE all bytes
L
L
L
WRITE Abort/NOP
L
H
H
Note : Using R/ W and BYTE WRITE(s), any one or more bytes may be written.
BW3
X
H
H
L
H
L
H
BW4
X
H
H
H
L
L
H
Linear Burst Address Table (MODE = LOW)
First Address (External)
X . . . X00
X . . . X01
X . . . X10
X . . . X11
Second Address (Internal)
X . . . X01
X . . . X10
X . . . X11
X . . . X00
Third Address (Internal)
X . . . X10
X . . . X11
X . . . X00
X . . . X01
Fourth Address (Internal)
X . . . X11
X . . . X00
X . . . X01
X . . . X10
Interleaved Burst Address Table (MODE = HIGH or NC)
First Address (External)
X . . . X00
X . . . X01
X . . . X10
X . . . X11
Second Address (Internal)
X . . . X01
X . . . X00
X . . . X11
X . . . X10
Third Address (Internal)
X . . . X10
X . . . X11
X . . . X00
X . . . X01
Fourth Address (Internal)
X . . . X11
X . . . X10
X . . . X01
X . . . X00
PRELIMINARY (July, 2005, Version 0.0)
9
AMIC Technology, Corp.