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74LVC3G17DP Ver la hoja de datos (PDF) - NXP Semiconductors.

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74LVC3G17DP Datasheet PDF : 18 Pages
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NXP Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
7.2 Pin description
Table 3. Pin description
Symbol
Pin
SOT505-2, SOT765-1,
SOT833-1 and SOT996-2
1A, 2A, 3A
1, 3, 6
GND
4
1Y, 2Y, 3Y
7, 5, 2
VCC
8
SOT902-1
7, 5, 2
4
1, 3, 6
8
8. Functional description
Description
data input
ground (0 V)
data output
supply voltage
Table 4.
Input
nA
L
H
Function table[1]
[1] H = HIGH voltage level; L = LOW voltage level.
9. Limiting values
Output
nY
L
H
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max
Unit
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VO
output voltage
VI < 0 V
VO > VCC or VO < 0 V
Active mode
Power-down mode
0.5
50
[1] 0.5
-
[1] 0.5
[1][2] 0.5
+6.5
V
-
mA
+6.5
V
±50
mA
VCC + 0.5 V
+6.5
V
IO
ICC
IGND
Tstg
Ptot
output current
supply current
ground current
storage temperature
total power dissipation
VO = 0 V to VCC
Tamb = 40 °C to +125 °C
-
±50
mA
-
100
mA
100 -
mA
65
+150
°C
[3] -
250
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K.
For XSON8, XSON8U and XQFN8U packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
74LVC3G17_6
Product data sheet
Rev. 06 — 6 June 2008
© NXP B.V. 2008. All rights reserved.
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