Audio ICs
(3) About the treble filter
BH3856S / BH3856FS
TIN
R1
2.1kΩ
C3
TVO
2200pF
C4
TVN
2200pF
R2
25kΩ
−3dB
IC internal BIAS
(
1
2
Vcc )
IC internal BIAS
(
1
2
Vcc )
Frequency f: (Hz)
f0
∆f
∗The band-pass filter is constructed using a multiple-feedback active filter.
f0 can be varied by changing the value of the capacitors.
(Theoretical formulas)
f0 =
1
2π
×
1
1
2
R1R2C3C4
1
Q
R1
2 × (C3 + C4) −1
R2C3C4
G = R2 × 1 + C3 −1
5kΩ
C4
Note : The filter gain is given by the formula on the left, but the total output gain
is determined by the this in combination with the internal circuit.
(When R1 = 2.1kΩ, R2 = 25kΩ, C3 = C4 = C)
f0 = 2.2 × 10−5
C
Q 1.73 G = 2.5
(4) I2C BUS control
High-frequency digital signals are input on the SCL and SDA terminals, so ensure that the wiring and PCB pattern is
designed in such a way as to ensure that these signals do not interfere with the analog signal system.
If you are not using I2C BUS control (i.e. you are using DC control), connect the SCL, SDA and SASS terminals to GND
(do not leave them disconnected).
(5) Step switching noise
The VC1, VC2, TC, BC and SC terminals have components connected to them the application example. The values of
these components may need to be changed depending on the signal level setting and PCB pattern.
Investigate carefully before deciding on the values of the various circuit constants.
The equivalent circuit for these terminals is given below (an integrator circuit is set at the first stage to slow the variation).
R Each Pin
C
VC1, VC2, BC, TC
SC
R value (kΩ)
30
200
(6) Volume and tone level settings
This specification sheet gives reference values for the amount of attenuation and gain with respect to the serial control
data. The internal D / A convertor is an R-2R circuit, and data exists for the places where continuous variation does not
occur between data. Use this when fine setting is required. The setting limits are up to 8 bits for volume (256 steps) and 6
bits (64 steps) for tone.