L1N08LE Ver la hoja de datos (PDF) - Intersil
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L1N08LE Datasheet PDF : 9 Pages
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RLP1N08LE
Temperature Dependence of Current Limiting and
Switching Speed
The RLP1N08LE is a monolithic power device which
incorporates a logic level PowerMOS transistor with a
resistor in series with the source. The base and emitter of a
lateral bipolar transistor is connected across this resistor,
and the collector of the bipolar transistor is connected to
the gate of the PowerMOS transistor. When the voltage
across the resistor reaches the value required to forward
bias the emitter base junction of the bipolar transistor, the
bipolar transistor “turns on”. A series resistor is
incorporated in series with the gate of the PowerMOS
transistor allowing the bipolar transistor to drive the gate of
the PowerMOS transistors to a voltage which just maintains
a constant current in the PowerMOS transistor. Since both
the resistance of the resistor in series with the PowerMOS
transistor source and voltage required to forward bias the
base emitter junction of the bipolar transistor vary with the
temperature, the current at which the device limits is a
function of temperature. This dependence is shown in
figure 3.
The resistor in series with the gate of the PowerMOS
transistor results in much slower switching than in most
PowerMOS transistors. This is an advantage where fast
switching can cause EMI or RFI. The switching speed is very
predictable, and a minimum as well as maximum fall time is
given in the device characteristics for this type.
DC Operation of the RLP1N08LE
The limit of the drain to source voltage for operation in
current limiting on a steady state (DC) basis is shown as
Figure 11. The dissipation in the device is simply the applied
drain to source voltage multiplied by the limiting current. This
device, like most Power MOSFET devices today, is limited to
150oC. The maximum voltage allowable can, therefore be
expressed as:
VDS = I-(-L-1---I5--M--0---o-×---C-(---R--–--θ--T-J---A-C---M--+---B--R--I--Eθ---C-N----AT---)-)
(EQ. 1)
Duty Cycle Operation of the RLP1N08LE
In many applications either the drain to source voltage or
the gate drive is not available 100% of the time. The copper
header on which the RLP1N08LE is mounted has a very
large thermal storage capability, so for pulse widths of less
than 100 milliseconds, the temperature of the header can
be considered a constant case temperature calculated
simply as:
TC = (VDS × ID × D × RθCA) + TAMBIENT
(EQ. 2)
Generally the heat storage capability of the silicon chip in a
power transistor is ignored for duty cycle calculations.
Making this assumption, limiting junction temperature to
150oC and using the TC calculated above, the expression
for maximum VDS under duty cycle operation is:
VDS = I--L----I--M--1---5-×---0-D----–--×--T---R-C----θ---J---C--
(EQ. 3)
These values are plotted as Figures 12 thru 16 for various
heat sink thermal resistances.
Limited Time Operations of the RLP1N08LE
Protection for a limited period of time is sufficient for many
applications. As stated above the heat storage in the silicon
chip can usually be ignored for computations of over 10
milliseconds and the thermal equivalent circuit reduces to a
simple enough circuit to allow easy computation on the
limiting conditions. The variation in limiting current with
temperature complicates the calculation of junction
temperature, but a simple straight line approximation of the
variation is accurate enough to allow meaningful
computations. The curves shown as figures 17 thru 21 give
an accurate indication of how long the specified voltage can
be applied to the device in the current limiting mode without
exceeding the maximum specified 150oC junction
termperature. In practice this tells you how long you have to
alleviate the condition causing the current limiting to occur.
6-441
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