NT6861 Ver la hoja de datos (PDF) - Novatek Microelectronics

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NT6861

8-Bit Microcontroller for Monitor

Novatek Microelectronics 

NT6861

11.3. Port2: P20 - P27

Port2, an 8-bit bi-directional I/O port (Figure 10), which may be programmed as an input or output pin by the software control.

When setting the PT2DIR control bit to '0', its corresponding pin will act as output pin. Clearing PT2DIR bit to '1', acts as an

input pin. When programmed as an input, it has an internal pull-up resistor. When programmed as an output, the data to be

output is latched to the port data register and output to the pin with push-pull structure. If programmed as an output pin, user

can read out its correspondent control bit about what user has written before. If programmed as an input pin, user can readout

what the I/O pin status outside. This port acts as an input port after reset.

Addr. Register INIT Bit7

Bit6

Bit5

Bit4

Bit3

$0002

$0003

PT2DIR

PT2

FFH P27OE P26OE P25OE P24OE P23OE

FFH P27

P26

P25

P24

P23

Bit2

P22OE

P22

Bit1

P21OE

P21

Bit0

P20OE W

P20 RW

11.4. Port3: P30 - P31

Port3 is an 2 bit bi-directional open-drain I/O port (Figure 11). Each pin of Port3 may be bit programmed as an input or output

pin with open drain structure. When Port3 works as an output, the data to be output is latched to the port data register and

output to the pin. For Port3 pins that have '1's written to them, user must connect PORT3 with external pulled-up resistor and

then PORT3 can be used as input (the input signal can be read). This port outputs high after reset .

P30, BP3 include Schmitt Trigger buffer for noise immunity and can be configured as the I2C pins SDA & SCL respectively. If

set ENDDC to LOW in IISTS control register, P30, P31 will act as SDA, SCL respectively. After the chip is reset, ENDDC will

be in HIGH and PORT3 will act as I/O pins.

Addr. Register INIT Bit7 Bit6

Bit5

Bit4

Bit3

$0004 PT3

03H

-

-

-

-

-

$0015 II STS 0FH

-

-

START STOP

START STOP ENDDC

Bit2

-

TRX

Bit1

P31

RXAK

Bit0

P30 RW

R

W

I/O

Data Out

Data In

Figure 11. Open Drain I/O Structure

19

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