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DAC8043 Datasheet PDF : 16 Pages
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DAC8043
APPLICATIONS INFORMATION
APPLICATION TIPS
In most applications, linearity depends upon the potential
of the IOUT and GND pins being equal to each other. In most
applications, the DAC is connected to an external op amp
with its noninverting input tied to ground (see Figure 16 and
Figure 17). The amplifier selected should have a low input bias
current and low drift over temperature. The amplifier’s input offset
voltage should be nulled to less than 200 μV (less than 10% of
1 LSB).
The noninverting input of the operational amplifier should have
a minimum resistance connection to ground; the usual bias
current compensation resistor should not be used. This resistor
can cause a variable offset voltage appearing as a varying output
error. All grounded pins should tie to a single common ground
point, avoiding ground loops. The VDD power supply should
have a low noise level with no transients greater than 17 V.
Unipolar Operation (2-Quadrant)
The circuits shown in Figure 16 and Figure 17 may be used with
an ac or dc reference voltage. The output of the circuit ranges
between 0 V and approximately −VREF (4095/4096), depending
upon the digital input code. The relationship between the
digital input and the analog output is shown in Table 6. The
limiting parameters for the VREF range are the maximum input
voltage range of the op amp or ±25 V, whichever is lowest.
VREF
5V
10V
SERIAL
DATA
INPUT
CLK
LD
VREF VDD
RFB
DAC8043
IOUT
GND
15pF
+15V
2
7
3 OP77 6
4
VOUT
–15V
Figure 16. Unipolar Operation with High Accuracy Op Amp (2-Quadrant)
VREF
5V
10V
R1
100Ω
SERIAL
DATA
INPUT
VREF
VDD
RFB
R2
50Ω
DAC8043
CLK
IOUT
LD
GND
+15V
15pF
2
7
3 OP42 6
4
VOUT
–15V
Figure 17. Unipolar Operation with Fast Op Amp and Gain Error Trimming
(2-Quadrant)
Gain error may be trimmed by adjusting R1, as shown in Figure 17.
The DAC register must first be loaded with all 1s. R1 may then
be adjusted until VOUT = −VREF (4095/4096). In the case of an
adjustable VREF, R1 and R2 may be omitted, with VREF adjusted
to yield the desired full-scale output.
In most applications, the DAC8043’s negligible zero-scale error
and very low gain error permit the elimination of the trimming
components (R1 and the external R2) without adversely affecting
on circuit performance.
Table 6. Unipolar Code Table1, 2
Digital Input Nominal Analog Output
MSB LSB
1111 1111 1111
(VOUT as Shown in Figure 16 and Figure 17)
− VREF
4095
4096
1000 0000 0001
− VREF
2049
4096
1000 0000 0000
− VREF
2048
4096
=
− VREF
2
0111 1111 1111
− VREF
2047
4096
0000 0000 0001
− VREF
1
4096
0000 0000 0000
− VREF
0
4096
=
0
1 Nominal full scale for Figure 16 and Figure 17 circuits is given by
FS
=
−
VREF
4095
4096
2 Nominal LSB magnitude for Figure 16 and Figure 17 circuits is given by
( ) LSB
=
VREF
1
4096
or
VREF
2−n
Rev. E | Page 12 of 16
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