3S12XDG128 Ver la hoja de datos (PDF) - Freescale Semiconductor
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3S12XDG128 Datasheet PDF : 1348 Pages
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Appendix G Detailed Register Map
0x01C0–0x01FF Freescale Scalable CAN — MSCAN (CAN2) Map (continued)
Address Name
R
0x01D1 CAN2IDAR1
W
R
0x01D2 CAN2IDAR2
W
R
0x01D3 CAN2IDAR3
W
R
0x01D4 CAN2IDMR0
W
R
0x01D5 CAN2IDMR1
W
R
0x01D6 CAN2IDMR2
W
R
0x01D7 CAN2IDMR3
W
R
0x01D8 CAN2IDAR4
W
R
0x01D9 CAN2IDAR5
W
R
0x01DA CAN2IDAR6
W
R
0x01DB CAN2IDAR7
W
R
0x01DC CAN2IDMR4
W
R
0x01DD CAN2IDMR5
W
R
0x01DE CAN2IDMR6
W
R
0x01DF CAN2IDMR7
W
R
0x01E0–
0x01EF
CAN2RXFG
W
0x01F0–
0x01FF
CAN2TXFG
R
W
Bit 7
AC7
AC7
AC7
AM7
AM7
AM7
AM7
AC7
AC7
AC7
AC7
AM7
AM7
AM7
AM7
Bit 6
AC6
Bit 5
AC5
Bit 4
AC4
Bit 3
AC3
Bit 2
AC2
Bit 1
AC1
AC6
AC5
AC4
AC3
AC2
AC1
AC6
AC5
AC4
AC3
AC2
AC1
AM6
AM5
AM4
AM3
AM2
AM1
AM6
AM5
AM4
AM3
AM2
AM1
AM6
AM5
AM4
AM3
AM2
AM1
AM6
AM5
AM4
AM3
AM2
AM1
AC6
AC5
AC4
AC3
AC2
AC1
AC6
AC5
AC4
AC3
AC2
AC1
AC6
AC5
AC4
AC3
AC2
AC1
AC6
AC5
AC4
AC3
AC2
AC1
AM6
AM5
AM4
AM3
AM2
AM1
AM6
AM5
AM4
AM3
AM2
AM1
AM6
AM5
AM4
AM3
AM2
AM1
AM6
AM5
AM4
AM3
AM2
AM1
FOREGROUND RECEIVE BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
FOREGROUND TRANSMIT BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
Bit 0
AC0
AC0
AC0
AM0
AM0
AM0
AM0
AC0
AC0
AC0
AC0
AM0
AM0
AM0
AM0
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
1333
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