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USB Peripheral/Host Controller

with SPI Interface

TIMING CHARACTERISTICS

(VCC = +3V to +3.6V, VL = +1.4V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +3.3V, VL =

+2.5V, TA = +25°C.) (Note 3)

PARAMETER

SYMBOL

CONDITIONS

MIN TYP MAX UNITS

USB TRANSMITTER TIMING CHARACTERISTICS (FULL-SPEED MODE)

D+, D- Rise Time

tRISE CL = 50pF, Figures 8 and 9

4

D+, D- Fall Time

tFALL CL = 50pF, Figures 8 and 9

4

Rise-/Fall-Time Matching

CL = 50pF, Figures 8 and 9 (Note 5)

90

Output-Signal Crossover Voltage

CL = 50pF, Figures 8 and 9 (Note 5)

1.3

USB TRANSMITTER TIMING CHARACTERISTICS (HOST LOW-SPEED MODE)

20

ns

20

ns

110

%

2.0

V

D+, D- Rise Time

tRISE 200pF ≤ CL ≤ 600pF, Figures 8 and 9

75

D+, D- Fall Time

tFALL 200pF ≤ CL ≤ 600pF, Figures 8 and 9

75

Rise-/Fall-Time Matching

200pF ≤ CL ≤ 600pF, Figures 8 and 9

80

Output-Signal Crossover Voltage

200pF ≤ CL ≤ 600pF, Figures 8 and 9

1.3

SPI BUS TIMING CHARACTERISTICS (VL = 2.5V) (Figures 10 and 11) (Note 6)

Serial Clock (SCLK) Period (Note 7)

tCP

VL > 2.5V

38.4

VL = 1.4V

77.7

SCLK Pulse-Width High

tCH

17

SCLK Pulse-Width Low

tCL

17

SS Fall to MISO Valid

tCSS

20

SS Leading Time Before the First

SCLK Edge

tL

30

300

ns

300

ns

120

%

2.0

V

ns

ns

ns

ns

ns

SS Trailing Time After the Last

SCLK Edge

tT

30

ns

Data-In Setup Time

Data-In Hold Time

SS Pulse High

SCLK Fall to MISO Propagation

Delay

tDS

tDH

tCSW

tDO

5

ns

10

ns

200

ns

14.2

ns

SCLK Fall to MOSI Propagation

Delay

tDI

14.2

ns

SCLK Fall to MOSI Drive

tON

SS High to MOSI High

Impedance

tOFF

3.5

ns

20

ns

SUSPEND TIMING CHARACTERISTICS

Time-to-Enter Suspend

Time-to-Exit Suspend

PWRDOWN = 1 to oscillator stop

PWRDOWN = 1 to 0 to OSCOKIRQ (Note 8)

5

µs

3

ms

Note 3: Parameters are 100% production tested at TA = +25°C. Specifications over temperature are guaranteed by design.

Note 4: Redesign in progress to meet USB specification.

Note 5: Guaranteed by bench testing. Limits are not production tested.

Note 6: At VL = 1.4V to 2.5V, derate all the SPI timing characteristics by 50%. Not production tested.

Note 7: The minimum period is derived from SPI timing parameters.

Note 8: Time-to-exit suspend is dependent on the crystal used.

______________________________________________________________________________________ 13

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