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4501 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

Número de pieza
componentes Descripción
Fabricante
4501
Mitsubishi
MITSUBISHI ELECTRIC  Mitsubishi
4501 Datasheet PDF : 113 Pages
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MITSUBISHI MICROCOMPUTERS
4501 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
TIMERS
The 4501 Group has the following timers.
Programmable timer
The programmable timer has a reload register and enables the
frequency dividing ratio to be set. It is decremented from a set-
ting value n. When it underflows (count to n + 1), a timer interrupt
request flag is set to 1,new data is loaded from the reload reg-
ister, and count continues (auto-reload function).
Fixed dividing frequency timer
The fixed dividing frequency timer has the fixed frequency divid-
ing ratio (n). An interrupt request flag is set to 1after every n
count of a count pulse.
F F1 6
n : Counter initial value
Count starts
Reload
n
1st underflow
Reload
2nd underflow
0016
Timer interrupt 1
request flag 0
n+1 count
n+1 count
Time
An interrupt occurs or
a skip instruction is executed.
Fig. 21 Auto-reload function
The 4501 Group timer consists of the following circuits.
Prescaler : frequency divider
Timer 1 : 8-bit programmable timer
Timer 2 : 8-bit programmable timer
(Timers 1 and 2 have the interrupt function, respectively)
16-bit timer
Prescaler and timers 1 and 2 can be controlled with the timer con-
trol registers W1, W2 and W6. The 16-bit timer is a free counter
which is not controlled with the control register.
Each function is described below.
Table 9 Function related timers
Circuit
Structure
Count source
Prescaler
Timer 1
Timer 2
16-bit timer
Frequency divider
Instruction clock
8-bit programmable Prescaler output (ORCLK)
binary down counter
(link to INT input)
8-bit programmable Timer 1 underflow
binary down counter Prescaler output (ORCLK)
CNTR input
System clock
16-bit fixed dividing Instruction clock
frequency binary down
counter
Frequency
dividing ratio
4, 16
1 to 256
1 to 256
65536
Use of output signal
Timer 1 and 2 count sources
Timer 2 count source
CNTR output
Timer 1 interrupt
CNTR output
Timer 2 interrupt
Watchdog timer
(The 16th bit is counted twice)
Control
register
W1
W1
W2
W2
24

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