KS8995XA Ver la hoja de datos (PDF) - Micrel

Número de pieza

componentes Descripción

Fabricante

KS8995XA

Integrated 5-Port 10/100 QoS Switch

Micrel 

KS8995XA

Micrel, Inc.

Pin Number

47

48

109

112

115

5

11

20

26

33

4

10

19

25

32

119

110

84

87

86

Pin Name

PWRDN_N

RESERVE/NC

Reserved

Reserved

RST_N

RXM1

RXM2

RXM3

RXM4

RXM5

RXP1

RXP2

RXP3

RXP4

RXP5

SCANEN

SCL

SCOL

SCONF0

SCONF1

Type(1)

Ipu

Ipu

I

I

I

I

I

I

I

I

I

I

Ipd

I/O

Ipd/O

Ipd

Ipd

85

SCRS

Ipd/O

111

SDA

I /O

78

SMRXC

I/O

83

SMRXD0

Ipd/O

Port

All

All

1

2

3

4

5

1

2

3

4

5

All

All

Pin Function(2)

Full-chip power down. Active low.

Reserved pin. No connect.

No connect.

No connect.

Reset the KS8995X. Active low.

Physical receive signal - (differential).

Physical receive signal - (differential).

Physical receive signal - (differential).

Physical receive signal - (differential).

Physical receive signal - (differential).

Physical receive signal + (differential).

Physical receive signal + (differential).

Physical receive signal + (differential).

Physical receive signal + (differential).

Physical receive signal + (differential).

Factory test pin.

Output clock at 81kHz in I2C master mode. See “Pin# 113.”

Switch MII collision detect.

Dual MII configuration pin.

Dual MII configuration pin.

Pin# (91, 86, 87):

Switch MII

PHY [5] MII

000

Disable, Otri

Disable, Otri

001

PHY Mode MII

Disable, Otri

010

MAC Mode MII

Disable, Otri

011

PHY Mode SNI

Disable, Otri

100

Disable

Disable

101

PHY Mode MII

PHY Mode MII

110

MAC Mode MII

PHY Mode MII

111

PHY Mode SNI

PHY Mode MII

Switch MII carrier sense.

Serial data input/output in I2C master mode. See “Pin# 113.”

Switch MII receive clock. PHY or MAC mode MII.

Switch MII receive bit 0; strap option: see “Register 11[1].”

Notes:

1. P = Power supply.

I = Input.

O = Output.

I/O = Bidirectional.

Gnd = Ground.

Ipu = Input w/internal pull-up.

Ipd = Input w/internal pull-down.

Ipd/O = Input w/internal pull-down during reset, output pin otherwise.

Ipu/O = Input w/internal pull-up during reset, output pin otherwise.

2. Otri = Output tristated.

May 2005

15

M9999-051305

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