µPD63310
1.5 Volume Setting Register Data (Command Types)
The data in the volume setting registers is written and read based on 6-bit parallel data that is input and output via the
DATA5 to DATA0 pins when the SELR pin is set for high level input. The data (commands) in the various volume setting
registers are described below.
0:
D5
D4
D3
D2
D1
D0
D4 to D0 indicate the data used to control gain in the IN1L register’s input signal, with codes corresponding
to the gain levels listed in Table 1-1 below. When D5 is “1”, mute mode is set.
Table 1-1. Correspondence of Codes and Gain Levels
D5
D4
D3
D2
D1
D0
Gain
0
0
0
0
0
0
0 dB
0
0
0
0
0
1
–1.5 dB
0
0
0
0
1
0
–3.0 dB
|
|
|
|
|
|
|
0
1
1
1
1
0
–45.0 dB
0
1
1
1
1
1
–46.5 dB
1
0
0
0
0
0
MUTENote
1
×
×
×
×
×
MUTE
Note Default value
Remark × : Don’t care
1:
D5
D4
D3
D2
D1
D0
D4 to D0 indicate the data used to control gain in the IN1R register’s input signal, with codes corresponding
to the gain levels listed in Table 1-1. Mute mode is set when D5 = 1.
2:
D5
D4
D3
D2
D1
D0
D4 to D0 indicate the data used to control gain in the IN2L register’s input signal, with codes corresponding
to the gain levels listed in Table 1-1. Mute mode is set when D5 = 1.
3:
D5
D4
D3
D2
D1
D0
D4 to D0 indicate the data used to control gain in the IN2R register’s input signal, with codes corresponding
to the gain levels listed in Table 1-1. Mute mode is set when D5 = 1.
4:
D5
D4
D3
D2
D1
D0
D4 to D0 indicate the data used to control gain in the IN3L register’s input signal, with codes corresponding
to the gain levels listed in Table 1-1. Mute mode is set when D5 = 1.
5:
D5
D4
D3
D2
D1
D0
D4 to D0 indicate the data used to control gain in the IN3R register’s input signal, with codes corresponding
to the gain levels listed in Table 1-1. Mute mode is set when D5 = 1.
6:
D5
D4
D3
D2
D1
D0
D4 to D0 indicate the data used to control gain in the IN4L register’s input signal, with codes corresponding
to the gain levels listed in Table 1-1. Mute mode is set when D5 = 1.
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