ST10R167
TABLE OF CONTENTS (continued)
Page
XX.4.3 Prescaler operation ....................................................................................................
43
XX.4.4 Direct drive .................................................................................................................
43
XX.4.5 Oscillator watchdog (OWD) ........................................................................................ 43
XX.4.6 Phase locked loop ......................................................................................................
43
XX.4.7 Memory cycle variables ..............................................................................................
44
XX.4.8 External clock drive XTAL1 .......................................... .............................................. 45
XX.4.9 Multiplexed bus ...........................................................................................................
45
XX.4.10 Demultiplexed bus ......................................................................................................
52
XX.4.11 CLKOUT and READY .................................................................................................
58
XX.4.12 External bus arbitration ........................................................................... .................... 60
XXI
PACKAGE MECHANICAL DATA ...........................................................................
62
XXII
ORDERING INFORMATION.......................................................................................
62
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