S-24CS04AFT-TBH Ver la hoja de datos (PDF) - Seiko Instruments Inc
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S-24CS04AFT-TBH Datasheet PDF : 47 Pages
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2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A
Rev.4.4_00
5. Device Addressing
To start communication, the master device on the system generates a start condition to the bus line. Next,
the master device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus.
The 4 most significant bits of the device address are called the "Device Code", and are fixed to "1010".
In S-24CS01A/02A, successive 3 bits are called the "Slave Address". These 3 bits are used to identify a
device on the system bus and are compared with the predetermined value which is defined by the address
input pins (A0, A1 and A2). When the comparison result matches, the slave device responds with an
acknowledge during the 9th clock cycle.
In S-24CS04A, successive 2 bits are called the "Slave Address". These 2 bits are used to identify a device
on the system bus and are compared with the predetermined value which is defined by the address input
pins (A1 and A2). When the comparison result matches, the slave device responds with an acknowledge
during the 9th clock cycle.
The successive 1 bit (P0) is used to define a page address and choose the two 256-byte memory blocks
(Address 000h to 0FFh and 100h to 1FFh).
In S-24CS08A, successive 1 bit is called the “Slave Addrdess”. This 1 bit is used to identify a device on the
system bus and is compared with the predetermined value which is defined by the address input pin (A2).
When the comparison result matches, the slave device responds with an acknowledge during the 9th
clocks cycle.
The successive 2 bits (P1 and P0) are used to define a page address and choose the four 256-byte
memory blocks (Address 000h to 0FFh, 100h to 1FFh, 200h to 2FFh and 300h to 3FFh).
Device Code
Slave Address
S-24CS01A/02A
1
0
1
0
A2 A1 A0 R/W
MSB
Device Code
LSB
Slave / Page
Address
S-24CS04A
1
0
1
0
A2 A1 P0 R/W
S-24CS08A
1
0
1
0
A2 P1 P0 R/W
MSB
LSB
Figure 12 Device Address
12
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