MX25L12805D Ver la hoja de datos (PDF) - Unspecified

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MX25L12805D

128M-BIT [x 1] CMOS SERIAL FLASH

Unspecified 

HARDWARE FEATURES

• SCLK Input

- Serial clock input

• SI Input

- Serial Data Input

• SO

- Serial Data Output

• WP#/ACC Pin

- Hardware write protection and Program/erase acceleration

• HOLD# pin

- pause the chip without diselecting the chip

• PACKAGE

- 16-pin SOP (300mil)

- All Pb-free devices are RoHS Compliant

MX25L12805D

GENERAL DESCRIPTION

The MX25L12805D is a CMOS 134,217,728 bit serial Flash Memory, which is configured as 16,777,216 x 8 internally. The

MX25L12805D features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The

three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the

device is enabled by CS# input.

The MX25L12805D provides sequential read operation on whole chip. User may start to read from any byte of the array.

While the end of the array is reached, the device will wrap around to the beginning of the array and continuously outputs

data until CS# goes high.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page

locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis, and erase command

is executed on sector (4K-byte), or block(64K-byte), or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read

command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please see security features section for more

details.

When the device is not in operation and CS# is high, it is put in standby mode and draws less than 20uA DC current.

The MX25L12805D utilizes MXIC's proprietary memory cell which reliably stores memory contents even after 100,000

program and erase cycles.

P/N: PM1310

REV. 1.1, OCT. 01, 2008

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