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Fabricante

HMA510GC-55

16 x 16-Bit CMOS Parallel Multiplier Accumulator

Intersil 

Pin Descriptions

NAME

PLCC PIN

NUMBER

VCC

17-20

GND

X0-X15

53, 54

1-10, 63-68

Y0-Y15/

P0-P15

45-52, 55-62

P16-P3

29-44

P32-P34

26-28

TC

21

ACC

14

SUB

13

RND

12

PREL

23

OEL

11

OEM

24

OEX

22

CLKX

15

CLKY

16

CLKP

25

HMA510

TYPE

I

I/O

I/O

I/O

I

I

I

I

I

I

I

I

I

I

I

DESCRIPTION

The +5V power supply pins. 0.1µF capacitors between the VCC and GND pins are rec-

ommended.

The device ground.

X-Input Data. These 16 data inputs provide the multiplicand which may be in two's com-

plement or unsigned magnitude format.

Y-Input/LSP Output Data. This 16-bit port is used to provide the multiplier which may

be in two's complement or unsigned magnitude format. It may also be used for output

of the Least Significant Product (P0-P15) or for preloading the LSP Register.

MSP Output Data. This 16-bit port is used to provide the Most Significant Product Out-

put (P16-P31). It may also be used to preload the MSP Register.

XTP Output Data. This 3-bit port is used to provide the Extended Product Output (P32-

P34). It may also be used to preload the XTP Register.

Two's Complement Control. Input data is interpreted as two's complement when this

control is HIGH. A LOW indicates the data is to be interpreted as unsigned magnitude

format. This control is latched on the rising edge of CLKX or CLKY.

Accumulate Control. When this control is HIGH, the Accumulator Output Register con-

tents are added to or subtracted from the current product, and the result is stored back

into the accumulator Output Register.

When LOW, the product is loaded into the accumulator Output Register overwriting the

current contents. This control is also latched on the rising edge of CLKX or CLKY.

Subtract Control. When both SUB and ACC are HIGH, the Accumulator Register con-

tents are subtracted from the current product. When ACC is HIGH and SUB is LOW,

the Accumulator Register contents and the current product are summed. The SUB con-

trol input is latched on the rising edge of CLKX or CLKY.

Round Control. When this control is HIGH, a one is added to the most significant bit of

the LSP. When LOW, the product is unchanged.

Preload Control. When this control is HIGH, the three bidirectional ports may be used

to preload the Accumulator Registers. The three-state controls (OEX, OEM, OEL) must

be HIGH, and the data will be preloaded on the rising edge of CLKP. When this control

is LOW, the Accumulator Registers function in a normal manner.

Y-Input/LSP Output Port Three-State Control. When OEL is HIGH, the output drivers

are in the high impedance state. This state is required for Y-data input or preloading the

LSP Register. When OEL is LOW, the port is enabled for LSP output.

MSP Output Port Three-State Control. A LOW on this control line enables the port for

output. When OEM is HIGH, the output drivers are in the high impedance state.

This control must be HIGH for preloading the MSP Register.

XTP Output Port Three-State Control. A LOW on this control line enables the port for

output. When OEX is HIGH, the output drivers are in the high impedance state. This

control must be HIGH for preloading the XTP Register.

X-Register Clock. The rising edge of this clock latches the X-Data Input Register along

with the TC, ACC, SUB and RND inputs.

Y-Register Clock. The rising edge of this clock latches the Y-Data Input Register along

with the TC, ACC, SUB and RND inputs.

Product Register Clock. The rising edge of CLKP latches the LSP, MSP and XTP Reg-

isters. If the preload control is active, the data on the I/O ports is loaded into these reg-

isters. If preload is not active, the accumulated product is loaded into the registers.

3-3

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