3 ON-CHIP MEMORY
This section describes the on-chip ROM, RAM, and EEPROM memories. The memory
maps for each mode of operation are shown and the RAM and l/O mapping register
(INIT) is described. The INIT register allows the on-chip RAM and the 64 control reg-
isters to be moved to suit the needs of a particular application.
3.1 Memory Maps
Composite memory maps for each mode of operation are shown in Figure 3-1. Mem-
ory locations are shown in the shaded areas and the contents of these shaded areas
are shown to the right. These modes include single-chip, expanded multiplexed, spe-
cial bootstrap, and special test.
Single-chip operating modes do not generate external addresses. Refer to Table 3-1
for a full list of the registers.
3
$0000
EXT
EXT
$1000
EXT
EXT
$B600
EXT
EXT
$E000
$FFFF
SINGLE
CHIP
EXPANDED BOOTSTRAP SPECIAL
TEST
0000 256 BYTES RAM
00FF
1000 64-BYTE REGISTER BLOCK
103F
B600 512 BYTES EEPROM
B7FF
BF40
BOOT
ROM
BFFF
BFC0
BFFF
SPECIAL MODES
INTERRUPT
VECTORS
E000 8 KBYTES ROM
FFFF
FFC0
FFFF
NORMAL
MODES
INTERRUPT
VECTORS
A8 MEM MAP
Figure 3-1 Memory Maps
MC68HC11A8
TECHNICAL DATA
ON-CHIP MEMORY
MOTOROLA
3-1