MAX7316ATE Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza

componentes Descripción

Fabricante

MAX7316ATE

10-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection

Maxim Integrated 

10-Port I/O Expander with LED Intensity

Control, Interrupt, and Hot-Insertion Protection

Table 4. Configuration Register (continued)

REGISTER

ADDRESS

CODE

REGISTER DATA

(HEX)

D7

D6

D5

D4

D3

D2

D1

D0

R/W

CONFIGURATION

Read back BLINK input pin status—

input is low

1

X

0

X

X

X

X

X

X

Read back BLINK input pin status—

input is high

1

0x0F

X

1

X

X

X

X

X

X

Read back data change interrupt status

—data change is not detected, and

INT/O8 output is high when interrupt

1

enable (I bit) is set

0

X

X

X

X

X

X

X

Read back data change interrupt status

—data change is detected, and INT/O8

output is low when interrupt enable (I bit)

1

is set

X = Don’t care.

1

X

X

X

X

X

X

X

The blink mode is disabled by clearing the blink enable

flag E in the configuration register (Table 4). When blink

mode is disabled, the state of the blink flip flag is

ignored, and the blink phase 0 register alone controls

the output ports.

The logic status of BLINK is made available as the

read-only blink status flag, blink in the configuration

register (Table 4). This flag allows BLINK to be used as

an extra general-purpose input (GPI) in applications not

using the blink function. When BLINK is going to be

used as a GPI, blink mode should be disabled by

clearing the blink enable flag E in the configuration reg-

ister (Table 4).

Blink Phase Register

When the blink function is disabled, the blink phase 0

register sets the logic levels of the eight ports (P0

through P7) when configured as outputs (Table 8). A

duplicate register called the blink phase 1 register is

also used if the blink function is enabled (Table 9). A

logic high sets the appropriate output port high imped-

ance, while a logic low makes the port go low.

Reading a blink phase register reads the value stored

in the register, not the actual port condition. The port

output itself may or may not be at a valid logic level,

depending on the external load connected.

The 9th output, O8, is controlled through 2 bits in the

configuration register, which provide the same static or

blink control as the other eight output ports.

PWM Intensity Control

The MAX7316 includes an internal oscillator, nominally

32kHz, to generate PWM timing for LED intensity con-

trol or other applications such as PWM trim DACs.

PWM can be disabled entirely for all the outputs. In this

case, all outputs are static and the MAX7316 operating

current is lowest because the internal PWM oscillator is

turned off.

BLINK ENABLE FLAG E

BLINK FLIP FLAG B

BLINK INPUT

Figure 11. Blink Logic

BLINK

PHASE

REGISTERS

14 ______________________________________________________________________________________

Share Link: