MAX7033 Ver la hoja de datos (PDF) - Maxim Integrated
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MAX7033 Datasheet PDF : 16 Pages
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MAX7033
315MHz/433MHz ASK Superheterodyne
Receiver with AGC Lock
Layout Considerations
A properly designed PCB is an essential part of any RF/
microwave circuit. On high-frequency inputs and outputs,
use controlled-impedance lines and keep them as short
as possible to minimize losses and radiation. At high
frequencies, trace lengths that are on the order of λ/10 or
longer act as antennas.
Keeping the traces short also reduces parasitic induc-
tance. Generally, 1in of a PCB trace adds about 20nH of
parasitic inductance. The parasitic inductance can have
a dramatic effect on the effective inductance of a pas-
sive component. For example, a 0.5in trace connecting a
100nH inductor adds an extra 10nH of inductance or 10%.
To reduce the parasitic inductance, use wider traces and
a solid ground or power plane below the signal traces.
Also, use low-inductance connections to ground on all
GND pins, and place decoupling capacitors close to all
power-supply pins.
Control Interface Considerations
When operating the MAX7033 with a +4.5V to +5.5V sup-
ply voltage, the SHDN and AC pins can be driven by a
microcontroller with either 3V or 5V interface logic levels.
When operating the MAX7033 with a +3.0V to +3.6V sup-
ply, only 3V logic from the microcontroller is allowed.
Typical Application Circuit
VDD3
IF VDD IS
THEN VDD3 IS
3.0V TO 3.6V CONNECTED TO VDD
CREATED BY LDO,
4.5V TO 5.5V AVAILABLE AT AVDD
(PIN 2)
C11
RF INPUT
C1
L1
VDD3
L3
C2
C9
L2
C14
C3
C4
**
COMPONENT VALUES
IN TABLE 1
C10
**SEE THE MIXER SECTION.
VDD
(SEE TABLE)
X1
C13 1
2
3
4
5
6
XTAL1
AVDD
LNAIN
LNASRC
AGND
LNAOUT
MAX7033
C12
28
XTAL2
27
SHDN
26
PDOUT
25
DATAOUT
24
VDD5
23
DSP
7
AVDD
8
MIXIN1
9
MIXIN2
10
AGND
11
IRSEL
12
MIXOUT
13
DGND
14
DVDD
22
DFFB
21
OPP
20
DSN
19
DFO
18
IFIN2
17
IFIN1
16
XTALSEL
15
AC
Y1
IF FILTER
IN GND OUT
C5
*
R2
C15
C6
TO/FROM µP
POWER-DOWN
DATA OUT
R3
C7
R1
FROM P
C8
*SEE PHASE-LOCKED LOOP SECTION.
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