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MAX3643(2005) Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
MAX3643
(Rev.:2005)
MaximIC
Maxim Integrated MaximIC
MAX3643 Datasheet PDF : 15 Pages
First Prev 11 12 13 14 15
Burst-Mode Laser Driver
Applications Information
Running Burst-Enable Single-Ended
See Figure 5 for setting up the single-ended LVTTL or
LVCMOS biasing for burst enable.
Layout Considerations
To minimize inductance, keep the connections
between the MAX3643 output pins and laser diode as
close as possible. Optimize the laser diode perfor-
mance by placing a bypass capacitor as close as pos-
sible to the laser anode. Take extra care to minimize
stray parasitic capacitance on the BIAS and MD pins.
Use good high-frequency layout techniques and multi-
layer boards with uninterrupted ground planes to mini-
mize EMI and crosstalk.
Laser Safety and IEC 825
Using the MAX3643 laser driver alone does not ensure
that a transmitter design is compliant with IEC 825. The
entire transmitter circuit and component selections must
be considered. Each user must determine the level of
fault tolerance required by the application, recognizing
that Maxim products are neither designed nor authorized
for use as components in systems intended for surgical
implant into the body, for applications intended to sup-
port or sustain life, or for any other application in which
the failure of a Maxim product could create a situation
where personal injury or death can occur.
Exposed-Paddle Package
The exposed paddle on the 24-pin TQFN provides a
very low thermal resistance path for heat removal from
the IC. The pad is also electrical ground on the
MAX3643 and must be soldered to the circuit board
ground for proper thermal and electrical performance.
Refer to Maxim Application Note HFAN-08.1: Thermal
Considerations for QFN and Other Exposed-Paddle
Packages for additional information.
LVTTL OR LVCMOS HIGH
LVTTL OR LVCMOS LOW
VCC
R3 = 5k
R4 = 3k
VCC
R5 = 5k
IN+
IN-
BEN+
BEN-
MAX3643
R6 = 9k
Figure 5. Single-Ended LVCMOS or LVTTL Biasing for Burst
Enable
Interface Model
VCC
IN+/BEN+
VCC
VCC
16k
5k
VCC
5k
IN-/BEN-
MAX3643
24k
Figure 6. Simplified Input Circuit Schematic
12 ______________________________________________________________________________________

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