MAX17482GTL Ver la hoja de datos (PDF) - Maxim Integrated

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MAX17482GTL

Dual-Phase, Quick-PWM Controllers for IMVP-6+/IMVP-6.5 CPU Core Power Supplies

Maxim Integrated 

Dual-Phase, Quick-PWM Controllers for

IMVP-6+/IMVP-6.5 CPU Core Power Supplies

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, VIN = 10V, VCC = VDD = VSHDN = VPGDIN = VPSI = VILIM = 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1

= VCSN1 = VCSP2 = VCSN2 = 1.0000V, FB = FBAC, RFBAC = 3.57kΩ from FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:

VSLOW = 5V; MAX17021: DPRSTP = GND; TA = -40°C to +105°C, unless otherwise noted.) (Note 4)

PARAMETER

SYMBOL

CONDITIONS

VALLEY CURRENT LIMIT, DROOP, AND CURRENT BALANCE

Current-Limit Threshold

Voltage (Positive)

VLIMIT VCSP_ - VCSN_

VTIME - VILIM = 100mV

VTIME - VILIM = 500mV

ILIM = VCC

CSP_, CSN_ Common-Mode

Input Range

Droop Amplifier

Transconductance

Gm(FBAC)

IFBAC/
[(VCSP_ - VCSN_)],

 indicates summation over all phases from 1 to

N, N = 2, VFBAC = VCSN- = 0.45V to 2V

Current-Balance Amplifier

Offset

(VCSP1 - VCSN1) - (VCSP2 - VCSN2) at ICCI = 0

CURRENT MONITOR (MAX17082/MAX17482 Only)

Current-Monitor

Transconductance

IMON Clamp Voltage

GATE DRIVERS

DH_ Gate Driver

On-Resistance

DL_ Gate Driver

On-Resistance

LOGIC AND I/O

Logic Input High Voltage

Logic Input Low Voltage

Gm(IMON)

VIMON,max

IIMON/
[(VCSP_ - VCSN_)],

 indicates summation over all phases from 1 to

N, N = 2, VCSN_ = 0.45V to 2V

ISINK = 10mA

RON(DH_)

RON(DL_)

BST_ - LX_ forced to 5V

High state (pullup)

Low state (pulldown)

High state (pullup)

Low state (pulldown)

VIH

SHDN, PGDIN:

MAX17021: DPRSLPVR

VIL

SHDN, PGDIN:

MAX17021: DPRSLPVR

Low-Voltage Logic Input

High Voltage

VIHLV

PSI, D0–D6:

MAX17082/MAX17482: DPRSLPVR, SLOW

MAX17021: DPRSTP

MIN

7

40

19

0

585

-1.25

2.2

1.05

2.3

0.67

TYP

MAX UNITS

13

60

mV

26

2

V

610

μS

+1.25 mV

2.6

mS

1.15

V

2.5

2.0

2.0

0.7

V

1.0

V

V

Low-Voltage Logic Input

Low Voltage

VILLV

PSI, D0–D6:

MAX17082/MAX17482: DPRSLPVR, SLOW

MAX17021: DPRSTP

0.33

V

Note 2: When pulse skipping, the output rises by approximately 1.5% when transitioning from continuous conduction to no load.

Note 3: On-time and minimum off-time specifications are measured from 50% to 50% at the DH_ and DL_ pins, with LX_ forced to

GND, BST_ forced to 5V, and a 500pF capacitor from DH_ to LX_ to simulate external MOSFET gate capacitance. Actual in-

circuit times might be different due to MOSFET switching speeds.

Note 4: Specifications to TA = -40°C and +105°C are guaranteed by design and are not production tested.

10 ______________________________________________________________________________________

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