HI-8281_03 Ver la hoja de datos (PDF) - Holt Integrated Circuits
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HI-8281_03 Datasheet PDF : 13 Pages
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HI-8281
AC ELECTRICAL CHARACTERISTICS
Vcc = 5V, V+=12V to 15V, V- = -12V to -15V,GND = 0V, TA = Oper. Temp. Range and fclk = 1MHz +0.1% with 60/40 duty cycle
PARAMETER
CONTROL WORD TIMING
Pulse Width - CWSTR
Setup - DATA BUS Valid to CWSTR HIGH
Hold - CWSTR HIGH to DATA BUS Hi-Z
RECEIVER TIMING
Delay - Start ARINC 32nd Bit to D/R LOW: High Speed
Low Speed
Delay - D/R LOW to EN L0W
Delay - EN LOW to D/R HIGH
Setup - SEL to EN L0W
Hold - SEL to EN HIGH
Delay - EN L0W to DATA BUS Valid
Delay - EN HIGH to DATA BUS Hi-Z
Pulse Width - EN1 or EN2
Spacing - EN HIGH to next EN L0W
FIFO TIMING
Pulse Width - PL1 or PL2
Setup - DATA BUS Valid to PL HIGH
Hold - PL HIGH to DATA BUS Hi-Z
Spacing - PL1 or PL2
Delay - PL2 HIGH to TX/R LOW
TRANSMISSION TIMING
Spacing - PL2 HIGH to ENTX HIGH
Delay - 32nd ARINC Bit to TX/R HIGH
Spacing - TX/R HIGH to ENTX L0W
LINE DRIVER OUTPUT TIMING
SYMBOL
tCWSTR
tCWSET
tCWHLD
tD/R
tD/R
tD/REN
tEND/R
tSELEN
tENSEL
tENDATA
tDATAEN
tEN
tENEN
tPL
tDWSET
tDWHLD
tPL12
tTX/R
tPL2EN
tDTX/R
tENTX/R
LIMITS
UNITS
MIN
TYP
MAX
130
ns
140
ns
0
ns
16
µs
128
µs
0
ns
200
ns
20
ns
50
ns
200
ns
30
ns
240
ns
50
ns
200
ns
110
ns
20
ns
0
ns
840
ns
0
µs
400
ns
0
ns
Delay - ENTX HIGH to TXA(OUT) or TXB(OUT): High Speed
Delay - ENTX HIGH to TXA(OUT) or TXB(OUT): Low Speed
Line driver transition differential times:
(High Speed)
(Low Speed)
high to low
low to high
high to low
low to high
tENDAT
tENDAT
tfx
trx
tfx
trx
27
µs
216
µs
1.0
1.5
2.0
µs
1.0
1.5
2.0
µs
5.0
10
15
µs
5.0
10
15
µs
REPEATER OPERATION TIMING
Delay - EN LOW to PL LOW
tENPL
0
ns
Hold - PL HIGH to EN HIGH
tPLEN
0
ns
Delay - TX/R LOW to ENTX HIGH
tTX/REN
0
ns
Master Reset Pulse Width
tMR
400
ns
ARINC Data Rate and Bit Timing
± 1%
HOLT INTEGRATED CIRCUITS
11
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