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HCD66712UA02 Ver la hoja de datos (PDF) - Hitachi -> Renesas Electronics

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HCD66712UA02
Hitachi
Hitachi -> Renesas Electronics Hitachi
HCD66712UA02 Datasheet PDF : 88 Pages
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HD66712U
Table 2
RS
0
0
1
1
Resistor Selection
R/:
Operation
0
IR write as an internal operation (display clear, etc.)
1
Read busy flag (DB7) and address counter (DB0 to DB6)
0
DR write as an internal operation (DR to DDRAM, CGRAM, or SEGRAM)
1
DR read as an internal operation (DDRAM, CGRAM, or SEGRAM to DR)
Display Data RAM (DDRAM)
Display data RAM (DDRAM) stores display data represented in 8-bit character codes. Its capacity is 80 ×
8 bits, or 80 characters. The area in display data RAM (DDRAM) that is not used for display can be used
as general data RAM.
The DDRAM address (ADD) is set in the address counter (AC) as a hexadecimal number, as shown in
Figure 1.
The relationship between DDRAM addresses and positions on the liquid crystal display is described and
shown on the following pages for a variety of cases.
MSB
LSB
AC AC6 AC5 AC4 AC3 AC2 AC1 AC0
Example: DDRAM address 4E
1001110
Figure 1 DDRAM Address
378

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