ADJD-J823 Ver la hoja de datos (PDF) - Avago Technologies

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ADJD-J823

Color Management Controller with Integrated RGB Photosensor

Avago Technologies 

Addressing

Each slave device on the serial bus needs to have a unique address. This is the first byte that is sent by the master-

transmitter after the START condition. The address is defined as the first seven bits of the first byte.

The eighth bit or least significant bit (LSB) determines the direction of data transfer. A ‘one’ in the LSB of the first byte

indicates that the master will read data from the addressed slave (master-receiver and slave-transmitter). A ‘zero’ in

this position indicates that the master will write data to the addressed slave (master-transmitter and slave-receiver).

A device whose address matches the address sent by the master will respond with an acknowledge for the first byte

and set itself up as a slave-transmitter or slave-receiver depending on the LSB of the first byte.

The slave address on ADJD-J823 is 0x58 (7-bits).

MSB

LSB

A6

A5

A4

A3

A2

A1

A0

R/W

1

0

1

1

0

0

0

Figure 8. Slave Addressing

Slave address

Data format

ADJD-J823 uses a register-based programming architecture. Each register has a unique address and controls a specific

function inside the chip.

To write to a register, the master first generates a START condition. Then it sends the slave address for the device it

wants to communicate with. The least significant bit (LSB) of the slave address must indicate that the master wants to

write to the slave. The addressed device will then acknowledge the master.

The master writes the register address it wants to access and waits for the slave to acknowledge. The master then

writes the new register data. Once the slave acknowledges, the master generates a STOP condition to end the data

transfer.

Start condition

Master will write data

Stop condition

S A6 A5 A4 A3 A2 A1 A0 W A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5 D4 D3 D2 D1 D0 A P

Master sends

slave address

Master writes

register address

Master writes

register data

Figure 9. Register Byte Write Protocol

Slave acknowledge

Slave acknowledge

Slave acknowledge

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