Customer Datasheet, Rev 3.1, 29 November 2000
STV0672-chipsetf-3-1.fm
by the state of the Digiport bus bits. The Digiport also controls the device current consumption that is reported to the host at
device enumeration. The current reference design for the STV0672-chipset has Digiport[7:0] connected to VSS, thus the VID and
PID are 16’h0553 and 16’h0100 respectively.
Digiport bit slice
Function
[3:0]
Configures the ls nibble of the PID
[5:4]
Master VID/PID select
[7:6]
Power setting
Table 4 : Basic Digiport Configuration
Digiport[3:0]
PID ls nibble
4’b0000
4’b0000
4’b0001
4’b0001
4’b0010
4’b0010
4’b0011
4’b0011
4’b0100
4’b0100
4’b0101
4’b0101
4’b0110
4’b0110
4’b0111
4’b0111
4’b1000
4’b1000
4’b1001
4’b1001
4’b1010
4’b1010
4’b1011
4’b1011
4’b1100
4’b1100
4’b1101
4’b1101
4’b1110
4’b1110
4’b1111
4’b1111
Table 5 : Digiport ls nibble Configuration
Digiport[5:4]
VID/PID Reported
2’b00
2’b01
2’b10
16’h0553/16’h010x1
16’h0553/16’h011x2
16’h0553/16’h012x3
Table 6 : Master VID/PID Selection
29 November 2000
Commercial in confidence
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