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SSD1881T1R1 Ver la hoja de datos (PDF) - Solomon Systech

Número de pieza
componentes Descripción
Fabricante
SSD1881T1R1
Solomon
Solomon Systech  Solomon
SSD1881T1R1 Datasheet PDF : 34 Pages
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9. PIN DESCRIPTION
VDD_ROW, +V1, VC, -V1 (Power Pin)
VDD_ROW is a power pin to supply power to the logic system. The voltage range is 2.7V to 5.5V with respect to the -V1 pin.
+V1, VC and -V1 are power supply pins to the LCD system. Their relationship is +V1 VC VDD_ROW -V1.
YD (Input Pin)
This input pin is used as a signal to start a frame and to reset the column address for writing. (Refer to Note 1)
LP (Input Pin)
This is an input pin and is used as a display data latch clock. The display data is latched at the falling edge of LP. (Refer to
Note 1)
FR (Input Pin)
This is an input pin and is used to change the LCD driving waveform polarity. If a power chip SSD1730 is used, the output FR
from the power chip should be connected to the FR pin of the row driver. (Refer to Note 1)
F1, F2 (Input Pin)
These are input pins and are used as driver pattern select signals. These two signals are generated by a column driver. If a
display system is formed by the column driver SSD1870 and the row driver SSD1881, outputs F10 and F20 from the column
driver should be connected to F1 and F2 of the row driver respectively. (Refer to Note 1)
DOFF# (Input Pin)
This is an input pin and is used to control the LC display. When it is set at “L” level, all common outputs are forced to VC level
and the LC display will be forced to blank, however, the contents of the latches are maintained. In the normal display operation,
it is set to “H” level. (Refer to Note 1)
SEL (Input Pin)
SSD1881 can be configured as 140 common outputs or 160 common outputs which is controlled by this input pin SEL.
When SEL is set at “L” level, 160 outputs are chosen and COM0 to COM159 will be used. When SEL is set at “H” level, 140
outputs are chosen and COM8 to COM147 will be used.
CIO1, CIO2 (I/O Pin)
These are I/O pins and they can be configured as an input or an output depending on the signal of SHL. When SHL is set at “L”
level, CIO1 is input and CIO2 is output. When SHL is set at “H” level, CIO1 is output and CIO2 is input. The output transition
occurs on the falling edge of LP. (Refer to Note 1)
SOLOMON
Rev 2.1
09/2002
SSD1881
12

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