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ATTINY43U-MUR Ver la hoja de datos (PDF) - Atmel Corporation

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ATTINY43U-MUR Datasheet PDF : 210 Pages
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7. Power Management and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See “Software BOD Disable” on page 31 for more details.
7.1 Sleep Modes
Figure 6-1 on page 23 presents the different clock systems in ATtiny43U, and their distribution.
The figure is helpful in selecting an appropriate sleep mode. Table 7-1 below shows the different
sleep modes and their wake-up sources.
Table 7-1.
Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains Oscillators
Wake-up Sources
Sleep Mode
Idle
ADC Noise Reduction
Power-down
XX
X
X
X XX X
X
X
X(1)
XX
X
X(1)
X
Note: 1. For INT0, only level interrupt.
7.1.1
Idle Mode
To enter any of the sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM[1:0] bits in the MCUCR Register select which
sleep mode (Idle, ADC Noise Reduction or Power-down) will be activated by the SLEEP instruc-
tion. See Table 7-2 on page 34 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Note that if a level triggered interrupt is used for wake-up the changed level must be held for
some time to wake up the MCU (and for the MCU to enter the interrupt service routine). See
“External Interrupts” on page 59 for details.
When the SM[1:0] bits are written to 00, the SLEEP instruction makes the MCU enter Idle mode,
stopping the CPU but allowing Analog Comparator, ADC, Timer/Counter, Watchdog, and the
interrupt system to continue operating. This sleep mode basically halts clkCPU and clkFLASH, while
allowing the other clocks to run.
30 ATtiny43U
8048C–AVR–02/12

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