UT82CRH51AC-68WCC Ver la hoja de datos (PDF) - Aeroflex UTMC

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UT82CRH51AC-68WCC

UT82CRH51A USART

Aeroflex UTMC 

from the CPU if the transmitter is enabled. TxEMPTY remains

low when the transmitter is disabled even if it is actually empty.

TxEMPTY can be used to indicate the end of a transmission

mode, so the CPU knows when to turn the line around in the

half-duplex operational mode.

In the Synchronous mode, a "high" on this output indicates that

a character has not been loaded and the SYNC character or char-

acters are about to be or are being transmitted automatically as

"fillers". TxEMPTY does not go low when the SYNC charac-

ters are being shifted out.

D(7:0)

RESET

CLK

C/D

RD

WR

CS

DSR

DTR

CTS

RTS

DATA

BUS

BUFFER

READ/WRITE

CONTROL

LOGIC

MODEM

CONTROL

INTERNAL

DATA BUS

TRANSMIT

BUFFER

(P-S)

TRANS-

MITTER

CONTROL

RECEIVER

BUFFER

(S-P)

RECEIVER

CONTROL

TxD

TxRDY

TxEMPTY

TxC

RxD

RxRDY

RxC

SYNDET/

BRKDET

Figure 5. UT82CRH51A Block Diagram Showing Modem

and Transmitter Buffer and Control Functions

1.5.3 TxC (Transmitter Clock)

The Transmitter Clock controls the rate at which the character is

to be transmitted. In the Synchronous transmission mode, the

Baud Rate (1x) is equal to the TxC frequency. In Asynchronous

transmission mode, the baud rate is a fraction of the actual TxC

frequency. A portion of the mode instruction selects this factor;

it can be 1, 1/16 or 1/64 the TxC.

For example:

If Baud Rate equals 110 Baud,

TxC equals 110 Hz in the 1x mode

TxC equals 1.72 kHz in the 16x mode

TxC equals 7.04 kHz in the 64x mode

The falling edge of TxC shifts the serial data out of the

UT82CRH51A.

1.6 RECEIVE BUFFER

The Receiver accepts serial data, converts this serial input to

parallel format, checks for bits or characters that are unique to

the communication technique and sends an "assembled" charac-

ter to the CPU. Serial data is input to RxD pin, and is clocked

in on the rising edge of RxC (figure 6).

1.7 RECEIVER CONTROL

This functional block manages all receiver-related activities

which consists of the following features (figure 6).

• The RxD initialization circuit prevents the

UT82CRH51A from mistaking an unused input line for

an active low data line in the "break condition". Before

starting to receive serial characters on the RxD line, a

valid "1" must first be detected after a chip master Reset.

Once this has been determined, a search for a valid low

(Start bit) is enabled. This feature is only active in the

asynchronous mode, and is only done once for each mas-

ter Reset.

• The False Start bit detection circuit prevents false starts

due to a transient noise spike by first detecting the falling

edge and then strobing the nominal center of the Start bit

(RxD = low).

• Parity error detection sets the corresponding status bit.

• The Framing Error status bit is set if the Stop bit is absent

at the end of the data byte (asynchronous mode).

1.7.1 RxRDY (Receiver Ready)

This output indicates the UT82CRH51A contains a character

ready to be input to the CPU. RxRDY can be connected to the

interrupt structure of the CPU or, for polled operation, the CPU

checks the condition of RxRDY using a Status Read operation.

RxEnable, when off, holds RxRDY in the Reset Condition. For

Asynchronous mode, to set RxRDY, the Receiver must be en-

abled to sense a Start Bit and a complete character must be as-

sembled and transferred to the Data Output Register. For

Synchronous mode, to set RxRDY, the Receiver must be en-

abled and a character must finish assembly and be transferred to

the Data Output Register.

Failure to read the received character from the Rx Data Output

Register prior to the assembly of the next Rx Data character will

set overrun condition error and the previous character will be

written over and lost. If the Rx Data is being read by the CPU

when the internal transfer is occurring, overrun error will be set

and the old character will be lost.

1.7.2 RxC (Receiver Clock)

The Receiver Clock controls the rate at which the character is to

be received. In Synchronous Mode, the Baud Rate (1x) is equal

to the actual frequency of RxC. In Asynchronous Mode, the

Baud Rate is a fraction of the actual RxC frequency. A portion

of the mode instruction selects this factor: 1, 1/16 or 1/64 the

RxC.

For example:

Baud Rate Equals 300 Baud, if

RxC equals 300 Hz in the 1x mode

RxC equals 4800 Hz in the 16x mode

RxC equals 19.2 kHz in the 64x mode

Baude Rate equals 2400 Baude, if

RxC equals 2400 Hz in the 1x mode

RxC equals 38.4 kHz in the 16x mode

RxC equals 153.6 kHz in the 64x mode

Data is sampled into the UT82CRH51A on the rising edge of

4

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