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UT82CRH51AC-36WPC Ver la hoja de datos (PDF) - Aeroflex UTMC

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Fabricante
UT82CRH51AC-36WPC
UTMC
Aeroflex UTMC UTMC
UT82CRH51AC-36WPC Datasheet PDF : 26 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
D(7:0)
RESET
CLK
C/D
RD
WR
CS
DSR
DTR
CTS
RTS
DATA
BUS
BUFFER
READ/WRITE
CONTROL
LOGIC
MODEM
CONTROL
TRANSMIT
BUFFER
(P-S)
TRANS-
MITTER
CONTROL
RECEIVE
BUFFER
(S-P)
RECEIVER
CONTROL
TxD
TxRDY
TxEMPTY
TxC
RxD
RxRDY
RxC
SYNDET/
BRKDET
Figure 4. UT82CRH51A Block Diagram Showing Data Bus Buffer
and Read/Write Logic Functions
1.2.4 RD (Read)
A "low" on this input informs the UT82CRH51A the CPU is
reading data or status information from the UT82CRH51A (fig-
ure 4).
C/D RD WR CS
0
0
1
0
DATA -> DATA BUS
0
1
0
0
DATA BUS -> DATA
1
0
1
0
STATUS -> DATA BUS
1
1
0
0
DATA BUS -> CONTROL
X
1
1
0
DATA BUS -> 3-STATE
X
X
X
1
DATA BUS -> 3-STATE
1.2.5 C/D (Control/Data)
This input, in conjunction with the WR and RD inputs, informs
the UT82CRH51A the word on the Data Bus is either a data
character, control word or status information.
1 = CONTROL/STATUS; 0 = DATA
1.2.6 CS (Chip Select)
A "low" on this input selects the UT82CRH51A. No reading or
writing will occur unless the device is selected. When CS is
high, the Data Bus is in the float state and RD and WR have no
effect on the chip.
1.3 MODEM CONTROL
The UT82CRH51A has a set of control inputs and outputs that
can be used to simplify the interface to almost any modem. The
modem control signals are general purpose in nature and can be
used to functions, other than modem control, if necessary (figure
5).
1.3.1 DSR (Data Set Ready)
The DSR input signal is a general-purpose, 1-bit inverting input
port. Its condition can be tested by the CPU using a Status Read
operation. The DSR input is normally used to test modem con-
ditions such as Data Set Ready.
1.3.2 DTR (Data Terminal Ready)
The DTR output signal is a general-purpose, 1-bit inverting out-
put port. It can be set "low" by programming the appropriate bit
in the Command Instruction word. The DTR output signal is
normally used for modem control such as Data Terminal Ready.
1.3.3 RTS (Request to Send)
The RTS output signal is a general-purpose, 1-bit inverting out-
put port. It can be set "low" by programming the appropriate bit
in the Command Instruction word. The RTS output signal is
normally used for modem control such as Request to Send.
1.3.4 CTS (Clear to Send)
A "low" on this input enables the UT82CRH51A to transmit se-
rial data if the TxEnable bit in the Command byte is set to a
"one". If either a TxEnable off or CTS off condition occurs
while the Tx is in operation, the Tx transmits all the data in the
USART written prior to TxDisable command before shutting
down.
1.4 TRANSMIT BUFFER
The Transmit Buffer Accepts parallel data from the Data Bus
Buffer, converts it to a serial bit stream, inserts the appropriate
characters or bits (based on the communication technique) and
outputs a composite serial stream of data on the TxD output pin
on the falling edge of TxC. The transmitter begins transmission
upon being enabled if CTS = 0. The TxD line will be held in the
marking state immediately upon a master Reset or when TxEn-
able or CTS is off or the transmitter is empty (figure 5).
1.5.TRANSMITTER CONTROL
The Transmitter Control manages all activities associated with
the transmission of serial data. It accepts and issues signals both
externally and internally to accomplish this function (figure 5).
1.5.1 TxRDY (Transmitter Ready)
This output signals the CPU the transmitter is ready to accept a
data character. The TxRDY output pin can be used as an inter-
rupt to the system since it is masked by TxEnable; or, for Polled
operation, the CPU can check TxRDY using a Status Read op-
eration. TxRDY is automatically reset by the leading edge of
WR when a data character is loaded from the CPU.
Note: When using the Polled operation, the TxRDY status bit
is not masked by TxEnable, but will only indicate the Empty/
Full Status of the Tx Data Input Register.
1.5.2 TxEMPTY (Transmitter Empty)
When the UT82CRH51A has no characters to send, the TxEMP-
TY output will go "high". It resets upon receiving a character
3

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