ISP1581 Ver la hoja de datos (PDF) - Philips Electronics
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ISP1581 Datasheet PDF : 80 Pages
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Philips Semiconductors
ISP1581
USB 2.0 HS interface device
DREQ (drive)
DACK(1) (host)
t d2
t d2
DIOW (host)
t d2
IORDY (drive)
t d12
DIOR (host)
DATA[15:0] (host)
DA[2:0] and CS[1:0]
t d3
t h3
t d10
t h3
t su1
t h1
CRC
t h3
(1) Programmable polarity: shown as active LOW.
Fig 34. UDMA timing: host terminating a burst during a write command.
MGT514
Table 83: UDMA mode timing parameters
VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = −40 to +85 °C.
Symbol Parameter
Tcy1
read/write cycle time (from strobe edge
to strobe edge)
tsu2
data set-up time at receiver
th2
data hold time at receiver
tsu1
data set-up time at sender
th1
data hold time at sender
td1
unlimited interlock time[1]
td2
limited interlock time[1]
td3
limited interlock time with minimum[1]
td4
data line drivers switch-off delay
td5
data line drivers switch-on delay (host)
data line drivers switch-on delay (drive)
tsu3
control signal set-up time before DACK
on
th3
control signal hold time after DACK off
td6
DACK on to control signal transition delay
td7
ready to paused delay
td8
strobe to ready delay to ensure a
synchronous pause
Mode 0
Min
Max
114
-
15
-
5
-
70
-
6
-
0
-
0
150
20
-
-
10
20
-
0
-
20
-
20
-
20
70
160
-
-
50
Mode 1
Min
Max
75
-
10
-
5
-
48
-
6
-
0
-
0
150
20
-
-
10
20
-
0
-
20
-
20
-
20
70
125
-
-
30
Mode 2
Unit
Min
Max
55
-
ns
7
-
ns
5
-
ns
34
-
ns
6
-
ns
0
-
ns
0
150
ns
20
-
ns
-
10
ns
20
-
ns
0
-
ns
20
-
ns
20
-
ns
20
70
ns
100
-
ns
-
20
ns
9397 750 09665
Product data
Rev. 04 — 18 July 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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