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PIC16C505-04I/

14-Pin, 8-Bit CMOS Microcontroller

Microchip Technology 

5.0 I/O PORT

As with any other register, the I/O register can be

written and read under program control. However,

read instructions (e.g., MOVF PORTB,W) always read

the I/O pins independent of the pin’s input/output

modes. On RESET, all I/O ports are defined as input

(inputs are at hi-impedance) since the I/O control

registers are all set.

5.1 PORTB

PORTB is an 8-bit I/O register. Only the low order 6

bits are used (RB<5:0>). Bits 7 and 6 are

unimplemented and read as '0's. Please note that RB3

is an input only pin. The configuration word can set

several I/O’s to alternate functions. When acting as

alternate functions, the pins will read as ‘0’ during port

read. Pins RB0, RB1, RB3 and RB4 can be configured

with weak pull-ups and also with wake-up on change.

The wake-up on change and weak pull-up functions

are not pin selectable. If pin 4 is configured as MCLR,

weak pull-up is always off and wake-up on change for

this pin is not enabled.

5.2 PORTC

PORTC is an 8-bit I/O register. Only the low order 6 bits

are used (RC<5:0>). Bits 7 and 6 are unimplemented

and read as ‘0’s.

5.3 TRIS Registers

The output driver control register is loaded with the

contents of the W register by executing the TRIS f

instruction. A '1' from a TRIS register bit puts the

corresponding output driver in a hi-impedance mode.

A '0' puts the contents of the output data latch on the

selected pins, enabling the output buffer. The

exceptions are RB3, which is input only, and RC5,

which may be controlled by the option register. See

Register 4-2.

Note:

A read of the ports reads the pins, not the

output data latches. That is, if an output

driver on a pin is enabled and driven high,

but the external system is holding it low, a

read of the port will indicate that the pin is

low.

The TRIS registers are “write-only” and are set (output

drivers disabled) upon RESET.

PIC16C505

5.4 I/O Interfacing

The equivalent circuit for an I/O port pin is shown in

Figure 5-1. All port pins except RB3, which is input

only, may be used for both input and output operations.

For input operations, these ports are non-latching. Any

input must be present until read by an input instruction

(e.g., MOVF PORTB,W). The outputs are latched and

remain unchanged until the output latch is rewritten. To

use a port pin as output, the corresponding direction

control bit in TRIS must be cleared (= 0). For use as an

input, the corresponding TRIS bit must be set. Any I/O

pin (except RB3) can be programmed individually as

input or output.

FIGURE 5-1: EQUIVALENT CIRCUIT

FOR A SINGLE I/O PIN

Data

Bus

D

Q

Data

WR

Latch

VDD

Port

CK Q

P

W

Reg

TRIS ‘f’

D

Q

TRIS

Latch

CK Q

N

I/O

pin(1)

VSS

Reset

(2)

RD Port

Note 1: I/O pins have protection diodes to VDD and VSS.

Note 2: See Table 3-1 for buffer type.

© 1999 Microchip Technology Inc.

DS40192C-page 19

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