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MK715R

Touch Screen Controller

Integrated Circuit Systems 

MK715

Warning - Operation under a Power Supply Switching Regulator

When using the MK715 in a system where the power is supplied by a switching regulator, do not perform screen

conversions when the regulator is operating in the power saving mode. Some switching regulators feature a low

power mode (for example, Linear Technology's "Burst Mode") where the output is turned on and off in order to save

power. The extra power supply noise generated when using this mode causes spurious data points to be returned

from the MK715, so it should be disabled when the MK715 is doing screen conversions.

Interrupts

The MK715 generates an interrupt to signal a change in touch status or to signal that a conversion is complete. The

INT pin (pin 2) goes high to signal an interrupt. Interrupts are then cleared by reading any register. However, if the

MK715 is in the process of generating an interrupt during a read cycle, then the interrupt is not cleared and INT will

stay high. This internal process may take 100ns, and so to guarantee that the interrupt is cleared, two successive read

cycles may be necessary.

Touch Screen Serial Port (Four Wire)

Data is written to, and read from, the MK715 via the serial port. When writing, only 8 data bits can be

written to each 12 bit register. The 4 highest order bits (D8-D11) in each register are read only and can

never be writtern. When reading, all 12 bits are returned.

The serial port has 4 pins - serial clock (SK), chip select (CS), data in (DI), and data out (DO). The SK acts on the rising

edge. The CS acts as a reset for the serial port with CS going high initiating a cycle. The cycle consists of 2 parts -

a write followed by a read. Each part consists of 12 bits. Refer to the serial port diagram on page 10 and timing

diagram on page 20.

After CS goes high, any number of leading zeros can occur on DI. When a one is presented (even if this is the first bit

after CS goes high), this becomes the start bit. The start bit is followed by 3 op-code bits. The first is a write bit (WR),

which determines whether the data following is actually loaded into the appropriate register or not. The next two bits

are address bits, which select 1 of 4 on-chip registers. The last 8 bits are data. If WR was low, then these data bits are

ignored.

On the fourteenth SK rising edge after a start bit, DO is released from tri-state and data is clocked out of the part. This

is the read part of the cycle. The register to be read is selected with the op-code address. The data are 12 bits long.

For the result of a conversion (which is stored in register 2), this data consists of 10 bits from the ADC, a bit identifying

an X or a Y coordinate, and a bit identifying a screen conversion or a general purpose conversion. For the other 3

registers, the data are only 8 bits long, so the 12 bit output word contains four leading zeros.

After the 12 data bits are clocked out, the DO pin stays active and bits will continue to appear until CS goes low. See

the following page for the timing diagram.

Three-Wire Serial Port

To configure the serial port for 3 wires, DI must be connected to DO to form a bi-directional data line. All other timing

and configuration remain unchanged.

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