CXD2424R
• In the direct reset mode, the signal output is reset to ODD or EVEN field depending on the input timing of the
vertical reset signal as shown in the figure below.
Field identification
VRI
1
2
HDO
fH
VDO
tp1
tp2
tp3
tp4
tp5
fH L: ODD H: EVEN
1
EVEN
VDO
2
ODD
Symbol
tp1
tp2
tp3∗1
tp4
tp5
Range of resetting to ODD
Range of resetting to EVEN
Range of resetting to ODD
Prohibited area
Prohibited area
Definition
Specified value Unit
22.0
µs
31.8
µs
—
µs
200
ns
200
ns
∗1 In the direct reset mode, the cycle of HD can be arbitrary. Therefore, tp3 is not specified.
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